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<title>embassy/embassy-stm32/src/rcc/mco.rs, branch fix-input-sync-bypass</title>
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<title>Merge branch main into n6</title>
<updated>2025-11-11T14:48:56+00:00</updated>
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<name>everdrone</name>
<email>giorgiotropiano@gmail.com</email>
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<published>2025-11-11T14:48:56+00:00</published>
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<entry>
<title>Rustfmt for edition 2024.</title>
<updated>2025-10-06T21:19:53+00:00</updated>
<author>
<name>Dario Nieuwenhuis</name>
<email>dirbaio@dirbaio.net</email>
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<published>2025-10-06T20:56:31+00:00</published>
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<title>stm32: add config to MCO to control the drive strength.</title>
<updated>2025-10-01T19:24:51+00:00</updated>
<author>
<name>Daniel Nilsson</name>
<email>daniel.nilsson@dectron.se</email>
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<published>2025-09-17T18:52:40+00:00</published>
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<title>Use N6 registers for MCOxSEL and MCOxPRE</title>
<updated>2025-09-21T12:50:54+00:00</updated>
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<name>everdrone</name>
<email>giorgiotropiano@gmail.com</email>
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<published>2025-09-21T12:50:54+00:00</published>
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<title>Add N6 family RCC config</title>
<updated>2025-09-20T10:39:33+00:00</updated>
<author>
<name>everdrone</name>
<email>giorgiotropiano@gmail.com</email>
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<published>2025-09-20T10:39:33+00:00</published>
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<entry>
<title>stm32/afio: make af_num() unavailable in afio chips.</title>
<updated>2025-09-05T22:14:03+00:00</updated>
<author>
<name>Dario Nieuwenhuis</name>
<email>dirbaio@dirbaio.net</email>
</author>
<published>2025-09-05T22:11:59+00:00</published>
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<title>Added rcc_c0v2 to fix undefined McoSource with STM32C071</title>
<updated>2025-07-21T03:37:48+00:00</updated>
<author>
<name>obe1line</name>
<email>chris.storah@gmail.com</email>
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<published>2025-07-21T03:37:48+00:00</published>
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<title>stm32: fix stm32g0b0 build.</title>
<updated>2025-07-16T20:08:50+00:00</updated>
<author>
<name>Dario Nieuwenhuis</name>
<email>dirbaio@dirbaio.net</email>
</author>
<published>2025-07-16T18:14:47+00:00</published>
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It has USB but not HSI48 which would break things. Only g0x1 has HSI48.
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It has USB but not HSI48 which would break things. Only g0x1 has HSI48.
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<entry>
<title>Remove Peripheral trait, rename PeripheralRef-&gt;Peri.</title>
<updated>2025-03-27T14:18:06+00:00</updated>
<author>
<name>Dario Nieuwenhuis</name>
<email>dirbaio@dirbaio.net</email>
</author>
<published>2025-03-26T15:01:37+00:00</published>
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<entry>
<title>stm32/gpio: refactor AfType</title>
<updated>2024-06-16T19:11:55+00:00</updated>
<author>
<name>Jan Špaček</name>
<email>patek.mail@gmail.com</email>
</author>
<published>2024-06-01T16:16:40+00:00</published>
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