embassy/embassy-stm32/src/timer/mod.rs, branch cyw43-link-status-updateUnnamed repository; edit this file 'description' to name the repository.
low-power: improve debug logic2025-12-06T21:24:30+00:00xoviatxoviat@users.noreply.github.com2025-12-06T21:24:30+00:00997ad131325a30f79ef5bf407200830ce488302e
stm32: use typelevel timer type2025-11-27T17:29:24+00:00xoviatxoviat@users.noreply.github.com2025-11-27T17:29:24+00:00790940a18c093fb7c7f94585be81d7d02892b4fb
timer: add writable ring buffer2025-11-25T16:14:55+00:00xoviatxoviat@users.noreply.github.com2025-11-25T16:14:55+00:002e70c376c884a64fc931406350fecb6c0314dcf0
stm32/stop: move stop_with_rtc into init2025-11-04T18:26:37+00:00xoviatxoviat@users.noreply.github.com2025-11-04T18:26:37+00:00488d06c0e9da673f770b41d8f79bf26227dc6d53
stm32/afio: use type inference for timer remaps as well.2025-09-05T21:00:31+00:00Dario Nieuwenhuisdirbaio@dirbaio.net2025-09-05T21:00:31+00:007419b398bf7cc5c1ff164c504f4a4027cd6bcd3b
stm32: rename timer channel trait; replace impls via macro with impls generic over timer channels2025-06-26T23:08:28+00:00melvdlhansw533@gmail.com2025-06-26T23:08:28+00:006f88c2c73caa63a6e534130f4a064cb95d3e9d7d
Merge pull request #4044 from yodaldevoid/stm32-opm-timer2025-04-06T20:09:45+00:00Dario Nieuwenhuisdirbaio@dirbaio.net2025-04-06T20:09:45+00:005b632e3d038204e81e65aa7dd26e42455ac6be03
STM32: One pulse mode timer
STM32: One pulse mode timer
stm32/timer: Support one pulse mode2025-04-04T17:40:22+00:00Gabriel Smithga29smith@gmail.com2025-04-02T18:30:06+00:00f8e5c902665edf02f78fbb223ce14b3743fc543b
Currently does not support output pins so it really is only useful to
create delayed interrupts based on external signals.
Currently does not support output pins so it really is only useful to
create delayed interrupts based on external signals.