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<title>embassy/examples/stm32g4/src/bin/usb_serial.rs, branch main</title>
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<entry>
<title>Rustfmt for edition 2024.</title>
<updated>2025-10-06T21:19:53+00:00</updated>
<author>
<name>Dario Nieuwenhuis</name>
<email>dirbaio@dirbaio.net</email>
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<published>2025-10-06T20:56:31+00:00</published>
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<title>Remove manual settings of `composite_with_iads=true`</title>
<updated>2024-12-24T12:23:08+00:00</updated>
<author>
<name>Eekle</name>
<email>96976531+Eekle@users.noreply.github.com</email>
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<published>2024-12-24T12:23:08+00:00</published>
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<title>Reduce use of the full `futures` crate.</title>
<updated>2024-04-26T21:22:25+00:00</updated>
<author>
<name>Dario Nieuwenhuis</name>
<email>dirbaio@dirbaio.net</email>
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<published>2024-04-26T21:18:28+00:00</published>
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<entry>
<title>usb: remove device_descriptor buffer, store bytes in UsbDevice.inner instead</title>
<updated>2024-03-23T00:35:15+00:00</updated>
<author>
<name>Adam Greig</name>
<email>adam@adamgreig.com</email>
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<published>2024-03-23T00:11:05+00:00</published>
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<entry>
<title>stm32/rcc: g4: consistent PllSource, add pll pqr limits, simplify a bit.</title>
<updated>2024-03-03T23:04:06+00:00</updated>
<author>
<name>Dario Nieuwenhuis</name>
<email>dirbaio@dirbaio.net</email>
</author>
<published>2024-03-03T22:18:29+00:00</published>
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<title>stm32: autogenerate mux config for all chips.</title>
<updated>2024-03-01T22:54:37+00:00</updated>
<author>
<name>Dario Nieuwenhuis</name>
<email>dirbaio@dirbaio.net</email>
</author>
<published>2024-02-26T02:28:27+00:00</published>
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<entry>
<title>Refinements</title>
<updated>2024-02-16T23:30:16+00:00</updated>
<author>
<name>Barnaby Walters</name>
<email>barnaby@waterpigs.co.uk</email>
</author>
<published>2024-02-16T23:30:16+00:00</published>
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* Implemented boost mode dance (RM0440 p234-245, 6.5.1)
* Enabled boost mode in usb_serial example, tested on hardware
* Removed hard requirement of a valid 48MHz source (HSI48 is checked if
  requested, PLL passed through as-is and assumed to be valid)
* Used calc_pclk to calculate APB frequencies
* Refactored 48MHz configuration code to remove unnecessary let and block
* Renamed ahb_freq to hclk for clarity and consistency
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* Implemented boost mode dance (RM0440 p234-245, 6.5.1)
* Enabled boost mode in usb_serial example, tested on hardware
* Removed hard requirement of a valid 48MHz source (HSI48 is checked if
  requested, PLL passed through as-is and assumed to be valid)
* Used calc_pclk to calculate APB frequencies
* Refactored 48MHz configuration code to remove unnecessary let and block
* Renamed ahb_freq to hclk for clarity and consistency
</pre>
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</entry>
<entry>
<title>Removed redundant HSI48 configuration</title>
<updated>2024-02-16T19:32:35+00:00</updated>
<author>
<name>Barnaby Walters</name>
<email>barnaby@waterpigs.co.uk</email>
</author>
<published>2024-02-16T19:32:35+00:00</published>
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<entry>
<title>[embassy-stm32]: started stm32g4 RCC refactor</title>
<updated>2024-02-15T22:56:26+00:00</updated>
<author>
<name>Barnaby Walters</name>
<email>barnaby@waterpigs.co.uk</email>
</author>
<published>2024-02-15T22:56:26+00:00</published>
<link rel='alternate' type='text/html' href='http://git.d464.sh/rust/embassy/commit/?id=5b7eff65417e491fa7908dfd8b62013efb55d30b'/>
<id>5b7eff65417e491fa7908dfd8b62013efb55d30b</id>
<content type='text'>
* Copied API from f.rs where applicable
* HSE and HSI independantly configurable
* Boost mode set by user rather
* Added HSE, pll1_q and pll1_p frequencies to set_clocks call
* Stubbed max module based on f.rs, needs cleanup
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* Copied API from f.rs where applicable
* HSE and HSI independantly configurable
* Boost mode set by user rather
* Added HSE, pll1_q and pll1_p frequencies to set_clocks call
* Stubbed max module based on f.rs, needs cleanup
</pre>
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</entry>
<entry>
<title>ci: use beta, add secondary nightly ci.</title>
<updated>2023-12-21T14:03:57+00:00</updated>
<author>
<name>Dario Nieuwenhuis</name>
<email>dirbaio@dirbaio.net</email>
</author>
<published>2023-12-21T13:57:49+00:00</published>
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