embassy/examples/stm32wb/memory.x, branch main Unnamed repository; edit this file 'description' to name the repository. stm32/ipcc: extract tl_mbox linker file to embassy-stm32 2023-05-27T20:03:25+00:00 xoviat xoviat@users.noreply.github.com 2023-05-27T20:03:25+00:00 c19967dcf24d5223de5fd9b390371dc24aeccc1d 






stm32/ipcc: fix hil test
2023-05-22T01:18:26+00:00

xoviat
xoviat@users.noreply.github.com

2023-05-22T01:18:26+00:00

d1dfaa190518df6adc66ab0716236bac3fe5f894












fix memory.x
2023-05-11T22:23:18+00:00

xoviat
xoviat@users.noreply.github.com

2023-05-11T22:23:18+00:00

bf45b1d83dba837dabc63361dc472902ab82cda4












stm32/ble: fix tests and add instructions to run example
2023-05-11T21:45:42+00:00

xoviat
xoviat@users.noreply.github.com

2023-05-11T21:45:42+00:00

8a620fd59ca2ad958aad279eb55a1c97ef100e86












removed hardcoded addresses in memory.x
2023-05-04T10:02:17+00:00

goueslati
ghaith.oueslati@habemus.com

2023-05-04T10:02:17+00:00

007f45292762ab27291dd54bd0cfdeb23e390de4












examples/stm32wb: do not reserve words at start of RAM.
2023-02-20T00:01:01+00:00

Dario Nieuwenhuis
dirbaio@dirbaio.net

2023-02-20T00:01:01+00:00

13328c58d385ef57db74d902b1056c175a2ab367

They're used to communicate from the app to ST's OTA bootloader. See AN5247. 

This bootloader is optional, must be flashed by the user, and requires changing the FLASH start address as well, so the current memory regions still require modifications to use it. Therefore there's no point in reserving these words.

Thanks @adamgreig for investigating the purpose.




They're used to communicate from the app to ST's OTA bootloader. See AN5247. 

This bootloader is optional, must be flashed by the user, and requires changing the FLASH start address as well, so the current memory regions still require modifications to use it. Therefore there's no point in reserving these words.

Thanks @adamgreig for investigating the purpose.






examples/stm32wb: fix linker script.
2023-02-19T22:02:31+00:00

Dario Nieuwenhuis
dirbaio@dirbaio.net

2023-02-19T22:00:16+00:00

272982ee5417ea6bdd5873e36717ba9ae9a59ee4

cortex-m-rt 0.7.2 now enforces the stack is 8-byte aligned. Stack is placed
at `ORIGIN(RAM) + LENGTH(RAM)` by default, which wasn't 8-byte-aligned. See https://github.com/rust-embedded/cortex-m/discussions/469

ST trims 8 bytes from start of RAM, and uses the whole 192kb, so let's just
copy that:

https://github.com/STMicroelectronics/STM32CubeWB/blob/bceb1dae09f912eae47fba059251d499ba32f4ca/Drivers/CMSIS/Device/ST/STM32WBxx/Source/Templates/gcc/linker/stm32wb55xx_flash_cm4.ld#L48





cortex-m-rt 0.7.2 now enforces the stack is 8-byte aligned. Stack is placed
at `ORIGIN(RAM) + LENGTH(RAM)` by default, which wasn't 8-byte-aligned. See https://github.com/rust-embedded/cortex-m/discussions/469

ST trims 8 bytes from start of RAM, and uses the whole 192kb, so let's just
copy that:

https://github.com/STMicroelectronics/STM32CubeWB/blob/bceb1dae09f912eae47fba059251d499ba32f4ca/Drivers/CMSIS/Device/ST/STM32WBxx/Source/Templates/gcc/linker/stm32wb55xx_flash_cm4.ld#L48







Add missing stm32wl/stm32wb chips except stm32wle
2022-04-08T01:15:27+00:00

Dario Nieuwenhuis
dirbaio@dirbaio.net

2022-04-08T01:15:27+00:00

0c07d0375406c6079e4b143cd7ac380d0a2bfd5f