Correct clk/rst field logic

4 files changed, 21 insertions, 18 deletions

diff --git a/examples/memory.x b/examples/memory.x
index f4263a412..528545b64 100644
--- a/examples/memory.x
+++ b/examples/memory.x
@@ -1,5 +1,5 @@
 MEMORY
 {
-    FLASH : ORIGIN = 0x20000000, LENGTH = 64K
-    RAM   : ORIGIN = 0x20010000, LENGTH = 64K
+    FLASH : ORIGIN = 0x20000000, LENGTH = 80K
+    RAM   : ORIGIN = 0x20014000, LENGTH = 48K
 }
diff --git a/examples/src/lib.rs b/examples/src/lib.rs
index 2018a3c25..4bb334da5 100644
--- a/examples/src/lib.rs
+++ b/examples/src/lib.rs
@@ -5,7 +5,7 @@
 //! These live with the examples so the HAL stays generic.
 
 use hal::{clocks, pins};
-use {embassy_mcxa as hal, panic_probe as _};
+use {defmt_rtt as _, embassy_mcxa as hal, panic_probe as _};
 
 /// Initialize clocks and pin muxing for UART2 debug console.
 /// Safe to call multiple times; writes are idempotent for our use.
diff --git a/src/clocks/mod.rs b/src/clocks/mod.rs
index 74a1f1a1f..e02840592 100644
--- a/src/clocks/mod.rs
+++ b/src/clocks/mod.rs
@@ -821,44 +821,44 @@ impl ClockOperator<'_> {
 /// This macro is used to implement the [`Gate`] trait for a given peripheral
 /// that is controlled by the MRCC peripheral.
 macro_rules! impl_cc_gate {
-    ($name:ident, $reg:ident, $field:ident, $config:ty) => {
+    ($name:ident, $clk_reg:ident, $rst_reg:ident, $field:ident, $config:ty) => {
         impl Gate for crate::peripherals::$name {
             type MrccPeriphConfig = $config;
 
             #[inline]
             unsafe fn enable_clock() {
                 let mrcc = unsafe { pac::Mrcc0::steal() };
-                mrcc.$reg().modify(|_, w| w.$field().enabled());
+                mrcc.$clk_reg().modify(|_, w| w.$field().enabled());
             }
 
             #[inline]
             unsafe fn disable_clock() {
                 let mrcc = unsafe { pac::Mrcc0::steal() };
-                mrcc.$reg().modify(|_r, w| w.$field().disabled());
+                mrcc.$clk_reg().modify(|_r, w| w.$field().disabled());
             }
 
             #[inline]
             fn is_clock_enabled() -> bool {
                 let mrcc = unsafe { pac::Mrcc0::steal() };
-                mrcc.$reg().read().$field().is_enabled()
+                mrcc.$clk_reg().read().$field().is_enabled()
             }
 
             #[inline]
             unsafe fn release_reset() {
                 let mrcc = unsafe { pac::Mrcc0::steal() };
-                mrcc.$reg().modify(|_, w| w.$field().enabled());
+                mrcc.$rst_reg().modify(|_, w| w.$field().enabled());
             }
 
             #[inline]
             unsafe fn assert_reset() {
                 let mrcc = unsafe { pac::Mrcc0::steal() };
-                mrcc.$reg().modify(|_, w| w.$field().disabled());
+                mrcc.$rst_reg().modify(|_, w| w.$field().disabled());
             }
 
             #[inline]
             fn is_reset_released() -> bool {
                 let mrcc = unsafe { pac::Mrcc0::steal() };
-                mrcc.$reg().read().$field().is_enabled()
+                mrcc.$rst_reg().read().$field().is_enabled()
             }
         }
     };
@@ -874,14 +874,14 @@ pub(crate) mod gate {
     // other than enabling through the MRCC gate. Currently, these peripherals will
     // ALWAYS return `Ok(0)` when calling [`enable_and_reset()`] and/or
     // [`SPConfHelper::post_enable_config()`].
-    impl_cc_gate!(PORT1, mrcc_glb_cc1, port1, NoConfig);
-    impl_cc_gate!(PORT2, mrcc_glb_cc1, port2, NoConfig);
-    impl_cc_gate!(PORT3, mrcc_glb_cc1, port3, NoConfig);
-    impl_cc_gate!(GPIO3, mrcc_glb_cc2, gpio3, NoConfig);
+    impl_cc_gate!(PORT1, mrcc_glb_cc1, mrcc_glb_rst1, port1, NoConfig);
+    impl_cc_gate!(PORT2, mrcc_glb_cc1, mrcc_glb_rst1, port2, NoConfig);
+    impl_cc_gate!(PORT3, mrcc_glb_cc1, mrcc_glb_rst1, port3, NoConfig);
+    impl_cc_gate!(GPIO3, mrcc_glb_cc2, mrcc_glb_rst2, gpio3, NoConfig);
 
     // These peripherals DO have meaningful configuration, and could fail if the system
     // clocks do not match their needs.
-    impl_cc_gate!(OSTIMER0, mrcc_glb_cc1, ostimer0, OsTimerConfig);
-    impl_cc_gate!(LPUART2, mrcc_glb_cc0, lpuart2, LpuartConfig);
-    impl_cc_gate!(ADC1, mrcc_glb_cc1, adc1, AdcConfig);
+    impl_cc_gate!(OSTIMER0, mrcc_glb_cc1, mrcc_glb_rst1, ostimer0, OsTimerConfig);
+    impl_cc_gate!(LPUART2, mrcc_glb_cc0, mrcc_glb_rst0, lpuart2, LpuartConfig);
+    impl_cc_gate!(ADC1, mrcc_glb_cc1, mrcc_glb_rst1, adc1, AdcConfig);
 }
diff --git a/src/lib.rs b/src/lib.rs
index 1bf54a98b..86c0dc45b 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -47,7 +47,6 @@ pub use rtc::Rtc0 as Rtc0Token;
 
 /// Initialize HAL with configuration (mirrors embassy-imxrt style). Minimal: just take peripherals.
 /// Also applies configurable NVIC priority for the OSTIMER OS_EVENT interrupt (no enabling).
-#[allow(unused_variables)]
 pub fn init(cfg: crate::config::Config) -> Peripherals {
     let peripherals = Peripherals::take();
     // Apply user-configured priority early; enabling is left to examples/apps
@@ -56,6 +55,10 @@ pub fn init(cfg: crate::config::Config) -> Peripherals {
     crate::interrupt::RTC.set_priority(cfg.rtc_interrupt_priority);
     // Apply user-configured priority early; enabling is left to examples/apps
     crate::interrupt::ADC1.set_priority(cfg.adc_interrupt_priority);
+
+    // Configure clocks
+    crate::clocks::init(cfg.clock_cfg).unwrap();
+
     peripherals
 }