diff options
| author | Gerzain Mata <[email protected]> | 2025-12-15 17:45:49 -0700 |
|---|---|---|
| committer | Gerzain Mata <[email protected]> | 2025-12-15 17:47:40 -0700 |
| commit | 59ade382d5f42178440e4cd1a42cff486ea09411 (patch) | |
| tree | 09fa8d536f9ec762146815f047c7ab6161c5e64a | |
| parent | 9933a781268494a6a9427295d9f8a17f4cecfb97 (diff) | |
Re-added function comments. Misc changes.
| -rw-r--r-- | embassy-stm32-wpan/src/wba/linklayer_plat.rs | 307 |
1 files changed, 290 insertions, 17 deletions
diff --git a/embassy-stm32-wpan/src/wba/linklayer_plat.rs b/embassy-stm32-wpan/src/wba/linklayer_plat.rs index 99afc78d6..108e84efe 100644 --- a/embassy-stm32-wpan/src/wba/linklayer_plat.rs +++ b/embassy-stm32-wpan/src/wba/linklayer_plat.rs | |||
| @@ -82,7 +82,10 @@ use core::sync::atomic::{AtomicBool, AtomicI32, AtomicPtr, AtomicU32, Ordering}; | |||
| 82 | use cortex_m::asm::{dsb, isb}; | 82 | use cortex_m::asm::{dsb, isb}; |
| 83 | use cortex_m::interrupt::InterruptNumber; | 83 | use cortex_m::interrupt::InterruptNumber; |
| 84 | use cortex_m::peripheral::NVIC; | 84 | use cortex_m::peripheral::NVIC; |
| 85 | use cortex_m::register::{basepri, primask}; | 85 | use cortex_m::register::basepri; |
| 86 | use critical_section; | ||
| 87 | #[cfg(feature = "defmt")] | ||
| 88 | use defmt::trace; | ||
| 86 | use embassy_stm32::NVIC_PRIO_BITS; | 89 | use embassy_stm32::NVIC_PRIO_BITS; |
| 87 | use embassy_time::{Duration, block_for}; | 90 | use embassy_time::{Duration, block_for}; |
| 88 | 91 | ||
| @@ -123,7 +126,6 @@ static RADIO_CALLBACK: AtomicPtr<()> = AtomicPtr::new(ptr::null_mut()); | |||
| 123 | static LOW_ISR_CALLBACK: AtomicPtr<()> = AtomicPtr::new(ptr::null_mut()); | 126 | static LOW_ISR_CALLBACK: AtomicPtr<()> = AtomicPtr::new(ptr::null_mut()); |
| 124 | 127 | ||
| 125 | static IRQ_COUNTER: AtomicI32 = AtomicI32::new(0); | 128 | static IRQ_COUNTER: AtomicI32 = AtomicI32::new(0); |
| 126 | static PRIMASK_SNAPSHOT: AtomicU32 = AtomicU32::new(0); | ||
| 127 | 129 | ||
| 128 | static PRIO_HIGH_ISR_COUNTER: AtomicI32 = AtomicI32::new(0); | 130 | static PRIO_HIGH_ISR_COUNTER: AtomicI32 = AtomicI32::new(0); |
| 129 | static PRIO_LOW_ISR_COUNTER: AtomicI32 = AtomicI32::new(0); | 131 | static PRIO_LOW_ISR_COUNTER: AtomicI32 = AtomicI32::new(0); |
| @@ -137,6 +139,10 @@ static RADIO_SLEEP_TIMER_VAL: AtomicU32 = AtomicU32::new(0); | |||
| 137 | static PRNG_STATE: AtomicU32 = AtomicU32::new(0); | 139 | static PRNG_STATE: AtomicU32 = AtomicU32::new(0); |
| 138 | static PRNG_INIT: AtomicBool = AtomicBool::new(false); | 140 | static PRNG_INIT: AtomicBool = AtomicBool::new(false); |
| 139 | 141 | ||
| 142 | // Critical-section restore token for IRQ enable/disable pairing. | ||
| 143 | // Only written when the IRQ disable counter transitions 0->1, and consumed when it transitions 1->0. | ||
| 144 | static mut CS_RESTORE_STATE: Option<critical_section::RestoreState> = None; | ||
| 145 | |||
| 140 | unsafe extern "C" { | 146 | unsafe extern "C" { |
| 141 | static SystemCoreClock: u32; | 147 | static SystemCoreClock: u32; |
| 142 | } | 148 | } |
| @@ -281,6 +287,19 @@ pub unsafe fn run_radio_sw_low_isr() { | |||
| 281 | // */ | 287 | // */ |
| 282 | #[unsafe(no_mangle)] | 288 | #[unsafe(no_mangle)] |
| 283 | pub unsafe extern "C" fn LINKLAYER_PLAT_ClockInit() { | 289 | pub unsafe extern "C" fn LINKLAYER_PLAT_ClockInit() { |
| 290 | // uint32_t linklayer_slp_clk_src = LL_RCC_RADIOSLEEPSOURCE_NONE; | ||
| 291 | // | ||
| 292 | // /* Get the Link Layer sleep timer clock source */ | ||
| 293 | // linklayer_slp_clk_src = LL_RCC_RADIO_GetSleepTimerClockSource(); | ||
| 294 | // if(linklayer_slp_clk_src == LL_RCC_RADIOSLEEPSOURCE_NONE) | ||
| 295 | // { | ||
| 296 | // /* If there is no clock source defined, should be selected before */ | ||
| 297 | // assert_param(0); | ||
| 298 | // } | ||
| 299 | // | ||
| 300 | // /* Enable AHB5ENR peripheral clock (bus CLK) */ | ||
| 301 | // __HAL_RCC_RADIO_CLK_ENABLE(); | ||
| 302 | trace!("LINKLAYER_PLAT_ClockInit: get_slptmr_value"); | ||
| 284 | let _ = link_layer::ll_intf_cmn_get_slptmr_value(); | 303 | let _ = link_layer::ll_intf_cmn_get_slptmr_value(); |
| 285 | } | 304 | } |
| 286 | 305 | ||
| @@ -291,6 +310,56 @@ pub unsafe extern "C" fn LINKLAYER_PLAT_ClockInit() { | |||
| 291 | // */ | 310 | // */ |
| 292 | #[unsafe(no_mangle)] | 311 | #[unsafe(no_mangle)] |
| 293 | pub unsafe extern "C" fn LINKLAYER_PLAT_DelayUs(delay: u32) { | 312 | pub unsafe extern "C" fn LINKLAYER_PLAT_DelayUs(delay: u32) { |
| 313 | // static uint8_t lock = 0; | ||
| 314 | // uint32_t t0; | ||
| 315 | // uint32_t primask_bit; | ||
| 316 | // | ||
| 317 | // /* Enter critical section */ | ||
| 318 | // primask_bit= __get_PRIMASK(); | ||
| 319 | // __disable_irq(); | ||
| 320 | // | ||
| 321 | // if (lock == 0U) | ||
| 322 | // { | ||
| 323 | // /* Initialize counter */ | ||
| 324 | // /* Reset cycle counter to prevent overflow | ||
| 325 | // As a us counter, it is assumed than even with re-entrancy, | ||
| 326 | // overflow will never happen before re-initializing this counter */ | ||
| 327 | // DWT->CYCCNT = 0U; | ||
| 328 | // /* Enable DWT by safety but should be useless (as already set) */ | ||
| 329 | // SET_BIT(DCB->DEMCR, DCB_DEMCR_TRCENA_Msk); | ||
| 330 | // /* Enable counter */ | ||
| 331 | // SET_BIT(DWT->CTRL, DWT_CTRL_CYCCNTENA_Msk); | ||
| 332 | // } | ||
| 333 | // /* Increment 're-entrance' counter */ | ||
| 334 | // lock++; | ||
| 335 | // /* Get starting time stamp */ | ||
| 336 | // t0 = DWT->CYCCNT; | ||
| 337 | // /* Exit critical section */ | ||
| 338 | // __set_PRIMASK(primask_bit); | ||
| 339 | // | ||
| 340 | // /* Turn us into cycles */ | ||
| 341 | // delay = delay * (SystemCoreClock / 1000000U); | ||
| 342 | // delay += t0; | ||
| 343 | // | ||
| 344 | // /* Busy waiting loop */ | ||
| 345 | // while (DWT->CYCCNT < delay) | ||
| 346 | // { | ||
| 347 | // }; | ||
| 348 | // | ||
| 349 | // /* Enter critical section */ | ||
| 350 | // primask_bit= __get_PRIMASK(); | ||
| 351 | // __disable_irq(); | ||
| 352 | // if (lock == 1U) | ||
| 353 | // { | ||
| 354 | // /* Disable counter */ | ||
| 355 | // CLEAR_BIT(DWT->CTRL, DWT_CTRL_CYCCNTENA_Msk); | ||
| 356 | // } | ||
| 357 | // /* Decrement 're-entrance' counter */ | ||
| 358 | // lock--; | ||
| 359 | // /* Exit critical section */ | ||
| 360 | // __set_PRIMASK(primask_bit); | ||
| 361 | // | ||
| 362 | trace!("LINKLAYER_PLAT_DelayUs: delay={}", delay); | ||
| 294 | block_for(Duration::from_micros(u64::from(delay))); | 363 | block_for(Duration::from_micros(u64::from(delay))); |
| 295 | } | 364 | } |
| 296 | 365 | ||
| @@ -313,8 +382,10 @@ pub unsafe extern "C" fn LINKLAYER_PLAT_Assert(condition: u8) { | |||
| 313 | // */ | 382 | // */ |
| 314 | #[unsafe(no_mangle)] | 383 | #[unsafe(no_mangle)] |
| 315 | pub unsafe extern "C" fn LINKLAYER_PLAT_WaitHclkRdy() { | 384 | pub unsafe extern "C" fn LINKLAYER_PLAT_WaitHclkRdy() { |
| 385 | trace!("LINKLAYER_PLAT_WaitHclkRdy"); | ||
| 316 | if AHB5_SWITCHED_OFF.swap(false, Ordering::AcqRel) { | 386 | if AHB5_SWITCHED_OFF.swap(false, Ordering::AcqRel) { |
| 317 | let reference = RADIO_SLEEP_TIMER_VAL.load(Ordering::Acquire); | 387 | let reference = RADIO_SLEEP_TIMER_VAL.load(Ordering::Acquire); |
| 388 | trace!("LINKLAYER_PLAT_WaitHclkRdy: reference={}", reference); | ||
| 318 | while reference == link_layer::ll_intf_cmn_get_slptmr_value() { | 389 | while reference == link_layer::ll_intf_cmn_get_slptmr_value() { |
| 319 | spin_loop(); | 390 | spin_loop(); |
| 320 | } | 391 | } |
| @@ -329,6 +400,18 @@ pub unsafe extern "C" fn LINKLAYER_PLAT_WaitHclkRdy() { | |||
| 329 | // */ | 400 | // */ |
| 330 | #[unsafe(no_mangle)] | 401 | #[unsafe(no_mangle)] |
| 331 | pub unsafe extern "C" fn LINKLAYER_PLAT_NotifyWFIEnter() { | 402 | pub unsafe extern "C" fn LINKLAYER_PLAT_NotifyWFIEnter() { |
| 403 | // /* Check if Radio state will allow the AHB5 clock to be cut */ | ||
| 404 | // | ||
| 405 | // /* AHB5 clock will be cut in the following cases: | ||
| 406 | // * - 2.4GHz radio is not in ACTIVE mode (in SLEEP or DEEPSLEEP mode). | ||
| 407 | // * - RADIOSMEN and STRADIOCLKON bits are at 0. | ||
| 408 | // */ | ||
| 409 | // if((LL_PWR_GetRadioMode() != LL_PWR_RADIO_ACTIVE_MODE) || | ||
| 410 | // ((__HAL_RCC_RADIO_IS_CLK_SLEEP_ENABLED() == 0) && (LL_RCC_RADIO_IsEnabledSleepTimerClock() == 0))) | ||
| 411 | // { | ||
| 412 | // AHB5_SwitchedOff = 1; | ||
| 413 | // } | ||
| 414 | trace!("LINKLAYER_PLAT_NotifyWFIEnter"); | ||
| 332 | AHB5_SWITCHED_OFF.store(true, Ordering::Release); | 415 | AHB5_SWITCHED_OFF.store(true, Ordering::Release); |
| 333 | } | 416 | } |
| 334 | 417 | ||
| @@ -341,7 +424,10 @@ pub unsafe extern "C" fn LINKLAYER_PLAT_NotifyWFIEnter() { | |||
| 341 | // */ | 424 | // */ |
| 342 | #[unsafe(no_mangle)] | 425 | #[unsafe(no_mangle)] |
| 343 | pub unsafe extern "C" fn LINKLAYER_PLAT_NotifyWFIExit() { | 426 | pub unsafe extern "C" fn LINKLAYER_PLAT_NotifyWFIExit() { |
| 427 | trace!("LINKLAYER_PLAT_NotifyWFIExit"); | ||
| 428 | // /* Check if AHB5 clock has been turned of and needs resynchronisation */ | ||
| 344 | if AHB5_SWITCHED_OFF.load(Ordering::Acquire) { | 429 | if AHB5_SWITCHED_OFF.load(Ordering::Acquire) { |
| 430 | // /* Read sleep register as earlier as possible */ | ||
| 345 | let value = link_layer::ll_intf_cmn_get_slptmr_value(); | 431 | let value = link_layer::ll_intf_cmn_get_slptmr_value(); |
| 346 | RADIO_SLEEP_TIMER_VAL.store(value, Ordering::Release); | 432 | RADIO_SLEEP_TIMER_VAL.store(value, Ordering::Release); |
| 347 | } | 433 | } |
| @@ -353,7 +439,29 @@ pub unsafe extern "C" fn LINKLAYER_PLAT_NotifyWFIExit() { | |||
| 353 | // * @retval None | 439 | // * @retval None |
| 354 | // */ | 440 | // */ |
| 355 | #[unsafe(no_mangle)] | 441 | #[unsafe(no_mangle)] |
| 356 | pub unsafe extern "C" fn LINKLAYER_PLAT_AclkCtrl(_enable: u8) {} | 442 | pub unsafe extern "C" fn LINKLAYER_PLAT_AclkCtrl(_enable: u8) { |
| 443 | trace!("LINKLAYER_PLAT_AclkCtrl: enable={}", _enable); | ||
| 444 | if _enable != 0 { | ||
| 445 | // #if (CFG_SCM_SUPPORTED == 1) | ||
| 446 | // /* SCM HSE BEGIN */ | ||
| 447 | // /* Polling on HSE32 activation */ | ||
| 448 | // SCM_HSE_WaitUntilReady(); | ||
| 449 | // /* Enable RADIO baseband clock (active CLK) */ | ||
| 450 | // HAL_RCCEx_EnableRadioBBClock(); | ||
| 451 | // /* SCM HSE END */ | ||
| 452 | // #else | ||
| 453 | // /* Enable RADIO baseband clock (active CLK) */ | ||
| 454 | // HAL_RCCEx_EnableRadioBBClock(); | ||
| 455 | // /* Polling on HSE32 activation */ | ||
| 456 | // while ( LL_RCC_HSE_IsReady() == 0); | ||
| 457 | // #endif /* CFG_SCM_SUPPORTED */ | ||
| 458 | // NOTE: Add a proper assertion once a typed `Radio` peripheral exists in embassy-stm32 | ||
| 459 | // that exposes the baseband clock enable status via RCC. | ||
| 460 | } else { | ||
| 461 | // /* Disable RADIO baseband clock (active CLK) */ | ||
| 462 | // HAL_RCCEx_DisableRadioBBClock(); | ||
| 463 | } | ||
| 464 | } | ||
| 357 | 465 | ||
| 358 | // /** | 466 | // /** |
| 359 | // * @brief Link Layer RNG request. | 467 | // * @brief Link Layer RNG request. |
| @@ -363,6 +471,25 @@ pub unsafe extern "C" fn LINKLAYER_PLAT_AclkCtrl(_enable: u8) {} | |||
| 363 | // */ | 471 | // */ |
| 364 | #[unsafe(no_mangle)] | 472 | #[unsafe(no_mangle)] |
| 365 | pub unsafe extern "C" fn LINKLAYER_PLAT_GetRNG(ptr_rnd: *mut u8, len: u32) { | 473 | pub unsafe extern "C" fn LINKLAYER_PLAT_GetRNG(ptr_rnd: *mut u8, len: u32) { |
| 474 | // uint32_t nb_remaining_rng = len; | ||
| 475 | // uint32_t generated_rng; | ||
| 476 | // | ||
| 477 | // /* Get the requested RNGs (4 bytes by 4bytes) */ | ||
| 478 | // while(nb_remaining_rng >= 4) | ||
| 479 | // { | ||
| 480 | // generated_rng = 0; | ||
| 481 | // HW_RNG_Get(1, &generated_rng); | ||
| 482 | // memcpy((ptr_rnd+(len-nb_remaining_rng)), &generated_rng, 4); | ||
| 483 | // nb_remaining_rng -=4; | ||
| 484 | // } | ||
| 485 | // | ||
| 486 | // /* Get the remaining number of RNGs */ | ||
| 487 | // if(nb_remaining_rng>0){ | ||
| 488 | // generated_rng = 0; | ||
| 489 | // HW_RNG_Get(1, &generated_rng); | ||
| 490 | // memcpy((ptr_rnd+(len-nb_remaining_rng)), &generated_rng, nb_remaining_rng); | ||
| 491 | // } | ||
| 492 | trace!("LINKLAYER_PLAT_GetRNG: ptr_rnd={:?}, len={}", ptr_rnd, len); | ||
| 366 | if ptr_rnd.is_null() || len == 0 { | 493 | if ptr_rnd.is_null() || len == 0 { |
| 367 | return; | 494 | return; |
| 368 | } | 495 | } |
| @@ -380,6 +507,7 @@ pub unsafe extern "C" fn LINKLAYER_PLAT_GetRNG(ptr_rnd: *mut u8, len: u32) { | |||
| 380 | // */ | 507 | // */ |
| 381 | #[unsafe(no_mangle)] | 508 | #[unsafe(no_mangle)] |
| 382 | pub unsafe extern "C" fn LINKLAYER_PLAT_SetupRadioIT(intr_cb: Option<Callback>) { | 509 | pub unsafe extern "C" fn LINKLAYER_PLAT_SetupRadioIT(intr_cb: Option<Callback>) { |
| 510 | trace!("LINKLAYER_PLAT_SetupRadioIT: intr_cb={:?}", intr_cb); | ||
| 383 | store_callback(&RADIO_CALLBACK, intr_cb); | 511 | store_callback(&RADIO_CALLBACK, intr_cb); |
| 384 | 512 | ||
| 385 | if intr_cb.is_some() { | 513 | if intr_cb.is_some() { |
| @@ -397,6 +525,7 @@ pub unsafe extern "C" fn LINKLAYER_PLAT_SetupRadioIT(intr_cb: Option<Callback>) | |||
| 397 | // */ | 525 | // */ |
| 398 | #[unsafe(no_mangle)] | 526 | #[unsafe(no_mangle)] |
| 399 | pub unsafe extern "C" fn LINKLAYER_PLAT_SetupSwLowIT(intr_cb: Option<Callback>) { | 527 | pub unsafe extern "C" fn LINKLAYER_PLAT_SetupSwLowIT(intr_cb: Option<Callback>) { |
| 528 | trace!("LINKLAYER_PLAT_SetupSwLowIT: intr_cb={:?}", intr_cb); | ||
| 400 | store_callback(&LOW_ISR_CALLBACK, intr_cb); | 529 | store_callback(&LOW_ISR_CALLBACK, intr_cb); |
| 401 | 530 | ||
| 402 | if intr_cb.is_some() { | 531 | if intr_cb.is_some() { |
| @@ -414,16 +543,31 @@ pub unsafe extern "C" fn LINKLAYER_PLAT_SetupSwLowIT(intr_cb: Option<Callback>) | |||
| 414 | // */ | 543 | // */ |
| 415 | #[unsafe(no_mangle)] | 544 | #[unsafe(no_mangle)] |
| 416 | pub unsafe extern "C" fn LINKLAYER_PLAT_TriggerSwLowIT(priority: u8) { | 545 | pub unsafe extern "C" fn LINKLAYER_PLAT_TriggerSwLowIT(priority: u8) { |
| 546 | trace!("LINKLAYER_PLAT_TriggerSwLowIT: priority={}", priority); | ||
| 417 | let active = nvic_get_active(RADIO_SW_LOW_INTR_NUM); | 547 | let active = nvic_get_active(RADIO_SW_LOW_INTR_NUM); |
| 418 | 548 | ||
| 549 | // /* Check if a SW low interrupt as already been raised. | ||
| 550 | // * Nested call far radio low isr are not supported | ||
| 551 | // **/ | ||
| 419 | if !active { | 552 | if !active { |
| 420 | let prio = if priority == 0 { | 553 | let prio = if priority == 0 { |
| 554 | // /* No nested SW low ISR, default behavior */ | ||
| 421 | pack_priority(mac::RADIO_SW_LOW_INTR_PRIO) | 555 | pack_priority(mac::RADIO_SW_LOW_INTR_PRIO) |
| 422 | } else { | 556 | } else { |
| 423 | pack_priority(mac::RADIO_INTR_PRIO_LOW) | 557 | pack_priority(mac::RADIO_INTR_PRIO_LOW) |
| 424 | }; | 558 | }; |
| 425 | nvic_set_priority(RADIO_SW_LOW_INTR_NUM, prio); | 559 | nvic_set_priority(RADIO_SW_LOW_INTR_NUM, prio); |
| 426 | } else if priority != 0 { | 560 | } else if priority != 0 { |
| 561 | // /* Nested call detected */ | ||
| 562 | // /* No change for SW radio low interrupt priority for the moment */ | ||
| 563 | // | ||
| 564 | // if(priority != 0) | ||
| 565 | // { | ||
| 566 | // /* At the end of current SW radio low ISR, this pending SW low interrupt | ||
| 567 | // * will run with RADIO_INTR_PRIO_LOW priority | ||
| 568 | // **/ | ||
| 569 | // radio_sw_low_isr_is_running_high_prio = 1; | ||
| 570 | // } | ||
| 427 | RADIO_SW_LOW_ISR_RUNNING_HIGH_PRIO.store(true, Ordering::Release); | 571 | RADIO_SW_LOW_ISR_RUNNING_HIGH_PRIO.store(true, Ordering::Release); |
| 428 | } | 572 | } |
| 429 | 573 | ||
| @@ -437,12 +581,18 @@ pub unsafe extern "C" fn LINKLAYER_PLAT_TriggerSwLowIT(priority: u8) { | |||
| 437 | // */ | 581 | // */ |
| 438 | #[unsafe(no_mangle)] | 582 | #[unsafe(no_mangle)] |
| 439 | pub unsafe extern "C" fn LINKLAYER_PLAT_EnableIRQ() { | 583 | pub unsafe extern "C" fn LINKLAYER_PLAT_EnableIRQ() { |
| 584 | trace!("LINKLAYER_PLAT_EnableIRQ"); | ||
| 585 | // irq_counter = max(0,irq_counter-1); | ||
| 586 | // | ||
| 587 | // if(irq_counter == 0) | ||
| 588 | // { | ||
| 589 | // /* When irq_counter reaches 0, restore primask bit */ | ||
| 590 | // __set_PRIMASK(primask_bit); | ||
| 591 | // } | ||
| 440 | if counter_release(&IRQ_COUNTER) { | 592 | if counter_release(&IRQ_COUNTER) { |
| 441 | let snapshot = PRIMASK_SNAPSHOT.swap(0, Ordering::Relaxed); | 593 | // When the counter reaches zero, restore prior interrupt state using the captured token. |
| 442 | if snapshot != 0 { | 594 | if let Some(token) = CS_RESTORE_STATE.take() { |
| 443 | cortex_m::interrupt::disable(); | 595 | critical_section::release(token); |
| 444 | } else { | ||
| 445 | cortex_m::interrupt::enable(); | ||
| 446 | } | 596 | } |
| 447 | } | 597 | } |
| 448 | } | 598 | } |
| @@ -454,11 +604,18 @@ pub unsafe extern "C" fn LINKLAYER_PLAT_EnableIRQ() { | |||
| 454 | // */ | 604 | // */ |
| 455 | #[unsafe(no_mangle)] | 605 | #[unsafe(no_mangle)] |
| 456 | pub unsafe extern "C" fn LINKLAYER_PLAT_DisableIRQ() { | 606 | pub unsafe extern "C" fn LINKLAYER_PLAT_DisableIRQ() { |
| 607 | trace!("LINKLAYER_PLAT_DisableIRQ"); | ||
| 608 | // if(irq_counter == 0) | ||
| 609 | // { | ||
| 610 | // /* Save primask bit at first interrupt disablement */ | ||
| 611 | // primask_bit= __get_PRIMASK(); | ||
| 612 | // } | ||
| 613 | // __disable_irq(); | ||
| 614 | // irq_counter ++; | ||
| 457 | if counter_acquire(&IRQ_COUNTER) { | 615 | if counter_acquire(&IRQ_COUNTER) { |
| 458 | let snapshot = if primask::read().is_active() { 1 } else { 0 }; | 616 | // Capture and disable using critical-section API on first disable. |
| 459 | PRIMASK_SNAPSHOT.store(snapshot, Ordering::Relaxed); | 617 | CS_RESTORE_STATE = Some(critical_section::acquire()); |
| 460 | } | 618 | } |
| 461 | cortex_m::interrupt::disable(); | ||
| 462 | } | 619 | } |
| 463 | 620 | ||
| 464 | // /** | 621 | // /** |
| @@ -473,6 +630,40 @@ pub unsafe extern "C" fn LINKLAYER_PLAT_DisableIRQ() { | |||
| 473 | // */ | 630 | // */ |
| 474 | #[unsafe(no_mangle)] | 631 | #[unsafe(no_mangle)] |
| 475 | pub unsafe extern "C" fn LINKLAYER_PLAT_EnableSpecificIRQ(isr_type: u8) { | 632 | pub unsafe extern "C" fn LINKLAYER_PLAT_EnableSpecificIRQ(isr_type: u8) { |
| 633 | trace!("LINKLAYER_PLAT_EnableSpecificIRQ: isr_type={}", isr_type); | ||
| 634 | // if( (isr_type & LL_HIGH_ISR_ONLY) != 0 ) | ||
| 635 | // { | ||
| 636 | // prio_high_isr_counter--; | ||
| 637 | // if(prio_high_isr_counter == 0) | ||
| 638 | // { | ||
| 639 | // /* When specific counter for link layer high ISR reaches 0, interrupt is enabled */ | ||
| 640 | // HAL_NVIC_EnableIRQ(RADIO_INTR_NUM); | ||
| 641 | // /* USER CODE BEGIN LINKLAYER_PLAT_EnableSpecificIRQ_1 */ | ||
| 642 | // | ||
| 643 | // /* USER CODE END LINKLAYER_PLAT_EnableSpecificIRQ_1 */ | ||
| 644 | // } | ||
| 645 | // } | ||
| 646 | // | ||
| 647 | // if( (isr_type & LL_LOW_ISR_ONLY) != 0 ) | ||
| 648 | // { | ||
| 649 | // prio_low_isr_counter--; | ||
| 650 | // if(prio_low_isr_counter == 0) | ||
| 651 | // { | ||
| 652 | // /* When specific counter for link layer SW low ISR reaches 0, interrupt is enabled */ | ||
| 653 | // HAL_NVIC_EnableIRQ(RADIO_SW_LOW_INTR_NUM); | ||
| 654 | // } | ||
| 655 | // | ||
| 656 | // } | ||
| 657 | // | ||
| 658 | // if( (isr_type & SYS_LOW_ISR) != 0 ) | ||
| 659 | // { | ||
| 660 | // prio_sys_isr_counter--; | ||
| 661 | // if(prio_sys_isr_counter == 0) | ||
| 662 | // { | ||
| 663 | // /* Restore basepri value */ | ||
| 664 | // __set_BASEPRI(local_basepri_value); | ||
| 665 | // } | ||
| 666 | // } | ||
| 476 | if (isr_type & link_layer::LL_HIGH_ISR_ONLY as u8) != 0 { | 667 | if (isr_type & link_layer::LL_HIGH_ISR_ONLY as u8) != 0 { |
| 477 | if counter_release(&PRIO_HIGH_ISR_COUNTER) { | 668 | if counter_release(&PRIO_HIGH_ISR_COUNTER) { |
| 478 | nvic_enable(mac::RADIO_INTR_NUM); | 669 | nvic_enable(mac::RADIO_INTR_NUM); |
| @@ -505,6 +696,42 @@ pub unsafe extern "C" fn LINKLAYER_PLAT_EnableSpecificIRQ(isr_type: u8) { | |||
| 505 | // */ | 696 | // */ |
| 506 | #[unsafe(no_mangle)] | 697 | #[unsafe(no_mangle)] |
| 507 | pub unsafe extern "C" fn LINKLAYER_PLAT_DisableSpecificIRQ(isr_type: u8) { | 698 | pub unsafe extern "C" fn LINKLAYER_PLAT_DisableSpecificIRQ(isr_type: u8) { |
| 699 | // if( (isr_type & LL_HIGH_ISR_ONLY) != 0 ) | ||
| 700 | // { | ||
| 701 | // prio_high_isr_counter++; | ||
| 702 | // if(prio_high_isr_counter == 1) | ||
| 703 | // { | ||
| 704 | // /* USER CODE BEGIN LINKLAYER_PLAT_DisableSpecificIRQ_1 */ | ||
| 705 | // | ||
| 706 | // /* USER CODE END LINKLAYER_PLAT_DisableSpecificIRQ_1 */ | ||
| 707 | // /* When specific counter for link layer high ISR value is 1, interrupt is disabled */ | ||
| 708 | // HAL_NVIC_DisableIRQ(RADIO_INTR_NUM); | ||
| 709 | // } | ||
| 710 | // } | ||
| 711 | // | ||
| 712 | // if( (isr_type & LL_LOW_ISR_ONLY) != 0 ) | ||
| 713 | // { | ||
| 714 | // prio_low_isr_counter++; | ||
| 715 | // if(prio_low_isr_counter == 1) | ||
| 716 | // { | ||
| 717 | // /* When specific counter for link layer SW low ISR value is 1, interrupt is disabled */ | ||
| 718 | // HAL_NVIC_DisableIRQ(RADIO_SW_LOW_INTR_NUM); | ||
| 719 | // } | ||
| 720 | // } | ||
| 721 | // | ||
| 722 | // if( (isr_type & SYS_LOW_ISR) != 0 ) | ||
| 723 | // { | ||
| 724 | // prio_sys_isr_counter++; | ||
| 725 | // if(prio_sys_isr_counter == 1) | ||
| 726 | // { | ||
| 727 | // /* Save basepri register value */ | ||
| 728 | // local_basepri_value = __get_BASEPRI(); | ||
| 729 | // | ||
| 730 | // /* Mask all other interrupts with lower priority that link layer SW low ISR */ | ||
| 731 | // __set_BASEPRI_MAX(RADIO_INTR_PRIO_LOW<<4); | ||
| 732 | // } | ||
| 733 | // } | ||
| 734 | trace!("LINKLAYER_PLAT_DisableSpecificIRQ: isr_type={}", isr_type); | ||
| 508 | if (isr_type & link_layer::LL_HIGH_ISR_ONLY as u8) != 0 { | 735 | if (isr_type & link_layer::LL_HIGH_ISR_ONLY as u8) != 0 { |
| 509 | if counter_acquire(&PRIO_HIGH_ISR_COUNTER) { | 736 | if counter_acquire(&PRIO_HIGH_ISR_COUNTER) { |
| 510 | nvic_disable(mac::RADIO_INTR_NUM); | 737 | nvic_disable(mac::RADIO_INTR_NUM); |
| @@ -533,6 +760,7 @@ pub unsafe extern "C" fn LINKLAYER_PLAT_DisableSpecificIRQ(isr_type: u8) { | |||
| 533 | // */ | 760 | // */ |
| 534 | #[unsafe(no_mangle)] | 761 | #[unsafe(no_mangle)] |
| 535 | pub unsafe extern "C" fn LINKLAYER_PLAT_EnableRadioIT() { | 762 | pub unsafe extern "C" fn LINKLAYER_PLAT_EnableRadioIT() { |
| 763 | trace!("LINKLAYER_PLAT_EnableRadioIT"); | ||
| 536 | nvic_enable(mac::RADIO_INTR_NUM); | 764 | nvic_enable(mac::RADIO_INTR_NUM); |
| 537 | } | 765 | } |
| 538 | 766 | ||
| @@ -543,6 +771,7 @@ pub unsafe extern "C" fn LINKLAYER_PLAT_EnableRadioIT() { | |||
| 543 | // */ | 771 | // */ |
| 544 | #[unsafe(no_mangle)] | 772 | #[unsafe(no_mangle)] |
| 545 | pub unsafe extern "C" fn LINKLAYER_PLAT_DisableRadioIT() { | 773 | pub unsafe extern "C" fn LINKLAYER_PLAT_DisableRadioIT() { |
| 774 | trace!("LINKLAYER_PLAT_DisableRadioIT"); | ||
| 546 | nvic_disable(mac::RADIO_INTR_NUM); | 775 | nvic_disable(mac::RADIO_INTR_NUM); |
| 547 | } | 776 | } |
| 548 | 777 | ||
| @@ -553,6 +782,12 @@ pub unsafe extern "C" fn LINKLAYER_PLAT_DisableRadioIT() { | |||
| 553 | // */ | 782 | // */ |
| 554 | #[unsafe(no_mangle)] | 783 | #[unsafe(no_mangle)] |
| 555 | pub unsafe extern "C" fn LINKLAYER_PLAT_StartRadioEvt() { | 784 | pub unsafe extern "C" fn LINKLAYER_PLAT_StartRadioEvt() { |
| 785 | trace!("LINKLAYER_PLAT_StartRadioEvt"); | ||
| 786 | // __HAL_RCC_RADIO_CLK_SLEEP_ENABLE(); | ||
| 787 | // NVIC_SetPriority(RADIO_INTR_NUM, RADIO_INTR_PRIO_HIGH); | ||
| 788 | // #if (CFG_SCM_SUPPORTED == 1) | ||
| 789 | // scm_notifyradiostate(SCM_RADIO_ACTIVE); | ||
| 790 | // #endif /* CFG_SCM_SUPPORTED */ | ||
| 556 | nvic_set_priority(mac::RADIO_INTR_NUM, pack_priority(mac::RADIO_INTR_PRIO_HIGH)); | 791 | nvic_set_priority(mac::RADIO_INTR_NUM, pack_priority(mac::RADIO_INTR_PRIO_HIGH)); |
| 557 | nvic_enable(mac::RADIO_INTR_NUM); | 792 | nvic_enable(mac::RADIO_INTR_NUM); |
| 558 | } | 793 | } |
| @@ -564,6 +799,13 @@ pub unsafe extern "C" fn LINKLAYER_PLAT_StartRadioEvt() { | |||
| 564 | // */ | 799 | // */ |
| 565 | #[unsafe(no_mangle)] | 800 | #[unsafe(no_mangle)] |
| 566 | pub unsafe extern "C" fn LINKLAYER_PLAT_StopRadioEvt() { | 801 | pub unsafe extern "C" fn LINKLAYER_PLAT_StopRadioEvt() { |
| 802 | trace!("LINKLAYER_PLAT_StopRadioEvt"); | ||
| 803 | // { | ||
| 804 | // __HAL_RCC_RADIO_CLK_SLEEP_DISABLE(); | ||
| 805 | // NVIC_SetPriority(RADIO_INTR_NUM, RADIO_INTR_PRIO_LOW); | ||
| 806 | // #if (CFG_SCM_SUPPORTED == 1) | ||
| 807 | // scm_notifyradiostate(SCM_RADIO_NOT_ACTIVE); | ||
| 808 | // #endif /* CFG_SCM_SUPPORTED */ | ||
| 567 | nvic_set_priority(mac::RADIO_INTR_NUM, pack_priority(mac::RADIO_INTR_PRIO_LOW)); | 809 | nvic_set_priority(mac::RADIO_INTR_NUM, pack_priority(mac::RADIO_INTR_PRIO_LOW)); |
| 568 | } | 810 | } |
| 569 | 811 | ||
| @@ -573,7 +815,18 @@ pub unsafe extern "C" fn LINKLAYER_PLAT_StopRadioEvt() { | |||
| 573 | // * @retval None | 815 | // * @retval None |
| 574 | // */ | 816 | // */ |
| 575 | #[unsafe(no_mangle)] | 817 | #[unsafe(no_mangle)] |
| 576 | pub unsafe extern "C" fn LINKLAYER_PLAT_RCOStartClbr() {} | 818 | pub unsafe extern "C" fn LINKLAYER_PLAT_RCOStartClbr() { |
| 819 | trace!("LINKLAYER_PLAT_RCOStartClbr"); | ||
| 820 | // #if (CFG_LPM_LEVEL != 0) | ||
| 821 | // PWR_DisableSleepMode(); | ||
| 822 | // /* Disabling stop mode prevents also from entering in standby */ | ||
| 823 | // UTIL_LPM_SetStopMode(1U << CFG_LPM_LL_HW_RCO_CLBR, UTIL_LPM_DISABLE); | ||
| 824 | // #endif /* (CFG_LPM_LEVEL != 0) */ | ||
| 825 | // #if (CFG_SCM_SUPPORTED == 1) | ||
| 826 | // scm_setsystemclock(SCM_USER_LL_HW_RCO_CLBR, HSE_32MHZ); | ||
| 827 | // while (LL_PWR_IsActiveFlag_VOS() == 0); | ||
| 828 | // #endif /* (CFG_SCM_SUPPORTED == 1) */ | ||
| 829 | } | ||
| 577 | 830 | ||
| 578 | // /** | 831 | // /** |
| 579 | // * @brief Link Layer notification for RCO calibration end. | 832 | // * @brief Link Layer notification for RCO calibration end. |
| @@ -581,7 +834,16 @@ pub unsafe extern "C" fn LINKLAYER_PLAT_RCOStartClbr() {} | |||
| 581 | // * @retval None | 834 | // * @retval None |
| 582 | // */ | 835 | // */ |
| 583 | #[unsafe(no_mangle)] | 836 | #[unsafe(no_mangle)] |
| 584 | pub unsafe extern "C" fn LINKLAYER_PLAT_RCOStopClbr() {} | 837 | pub unsafe extern "C" fn LINKLAYER_PLAT_RCOStopClbr() { |
| 838 | trace!("LINKLAYER_PLAT_RCOStopClbr"); | ||
| 839 | // #if (CFG_LPM_LEVEL != 0) | ||
| 840 | // PWR_EnableSleepMode(); | ||
| 841 | // UTIL_LPM_SetStopMode(1U << CFG_LPM_LL_HW_RCO_CLBR, UTIL_LPM_ENABLE); | ||
| 842 | // #endif /* (CFG_LPM_LEVEL != 0) */ | ||
| 843 | // #if (CFG_SCM_SUPPORTED == 1) | ||
| 844 | // scm_setsystemclock(SCM_USER_LL_HW_RCO_CLBR, HSE_16MHZ); | ||
| 845 | // #endif /* (CFG_SCM_SUPPORTED == 1) */ | ||
| 846 | } | ||
| 585 | 847 | ||
| 586 | // /** | 848 | // /** |
| 587 | // * @brief Link Layer requests temperature. | 849 | // * @brief Link Layer requests temperature. |
| @@ -589,7 +851,12 @@ pub unsafe extern "C" fn LINKLAYER_PLAT_RCOStopClbr() {} | |||
| 589 | // * @retval None | 851 | // * @retval None |
| 590 | // */ | 852 | // */ |
| 591 | #[unsafe(no_mangle)] | 853 | #[unsafe(no_mangle)] |
| 592 | pub unsafe extern "C" fn LINKLAYER_PLAT_RequestTemperature() {} | 854 | pub unsafe extern "C" fn LINKLAYER_PLAT_RequestTemperature() { |
| 855 | trace!("LINKLAYER_PLAT_RequestTemperature"); | ||
| 856 | // #if (USE_TEMPERATURE_BASED_RADIO_CALIBRATION == 1) | ||
| 857 | // ll_sys_bg_temperature_measurement(); | ||
| 858 | // #endif /* USE_TEMPERATURE_BASED_RADIO_CALIBRATION */ | ||
| 859 | } | ||
| 593 | 860 | ||
| 594 | // /** | 861 | // /** |
| 595 | // * @brief PHY Start calibration. | 862 | // * @brief PHY Start calibration. |
| @@ -597,7 +864,9 @@ pub unsafe extern "C" fn LINKLAYER_PLAT_RequestTemperature() {} | |||
| 597 | // * @retval None | 864 | // * @retval None |
| 598 | // */ | 865 | // */ |
| 599 | #[unsafe(no_mangle)] | 866 | #[unsafe(no_mangle)] |
| 600 | pub unsafe extern "C" fn LINKLAYER_PLAT_PhyStartClbr() {} | 867 | pub unsafe extern "C" fn LINKLAYER_PLAT_PhyStartClbr() { |
| 868 | trace!("LINKLAYER_PLAT_PhyStartClbr"); | ||
| 869 | } | ||
| 601 | 870 | ||
| 602 | // /** | 871 | // /** |
| 603 | // * @brief PHY Stop calibration. | 872 | // * @brief PHY Stop calibration. |
| @@ -605,7 +874,9 @@ pub unsafe extern "C" fn LINKLAYER_PLAT_PhyStartClbr() {} | |||
| 605 | // * @retval None | 874 | // * @retval None |
| 606 | // */ | 875 | // */ |
| 607 | #[unsafe(no_mangle)] | 876 | #[unsafe(no_mangle)] |
| 608 | pub unsafe extern "C" fn LINKLAYER_PLAT_PhyStopClbr() {} | 877 | pub unsafe extern "C" fn LINKLAYER_PLAT_PhyStopClbr() { |
| 878 | trace!("LINKLAYER_PLAT_PhyStopClbr"); | ||
| 879 | } | ||
| 609 | 880 | ||
| 610 | // /** | 881 | // /** |
| 611 | // * @brief Notify the upper layer that new Link Layer timings have been applied. | 882 | // * @brief Notify the upper layer that new Link Layer timings have been applied. |
| @@ -613,7 +884,9 @@ pub unsafe extern "C" fn LINKLAYER_PLAT_PhyStopClbr() {} | |||
| 613 | // * @retval None. | 884 | // * @retval None. |
| 614 | // */ | 885 | // */ |
| 615 | #[unsafe(no_mangle)] | 886 | #[unsafe(no_mangle)] |
| 616 | pub unsafe extern "C" fn LINKLAYER_PLAT_SCHLDR_TIMING_UPDATE_NOT(_timings: *const link_layer::Evnt_timing_t) {} | 887 | pub unsafe extern "C" fn LINKLAYER_PLAT_SCHLDR_TIMING_UPDATE_NOT(_timings: *const link_layer::Evnt_timing_t) { |
| 888 | trace!("LINKLAYER_PLAT_SCHLDR_TIMING_UPDATE_NOT: timings={:?}", _timings); | ||
| 889 | } | ||
| 617 | 890 | ||
| 618 | // /** | 891 | // /** |
| 619 | // * @brief Get the ST company ID. | 892 | // * @brief Get the ST company ID. |
