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| author | James Munns <[email protected]> | 2025-12-18 18:18:31 +0000 |
|---|---|---|
| committer | GitHub <[email protected]> | 2025-12-18 18:18:31 +0000 |
| commit | 660abf8a659efa14ddc7ef5e5e11d83f84b61eaf (patch) | |
| tree | 573c31d534d1db1948e96596da7407649b2f15b8 | |
| parent | b494f2819c32c1b0e6884af8a259c314af2ec2de (diff) | |
| parent | 743295b1e9836016827c635877ecd8870b2620c3 (diff) | |
Merge pull request #5106 from felipebalbi/mcxa/dma
[MCXA] dma: fix typo
| -rw-r--r-- | embassy-mcxa/src/dma.rs | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/embassy-mcxa/src/dma.rs b/embassy-mcxa/src/dma.rs index 8d519d99b..b68f55e65 100644 --- a/embassy-mcxa/src/dma.rs +++ b/embassy-mcxa/src/dma.rs | |||
| @@ -1924,7 +1924,7 @@ impl Iterator for TransferErrorRawIter { | |||
| 1924 | 1924 | ||
| 1925 | for (mask, var) in TransferErrorRaw::MAP { | 1925 | for (mask, var) in TransferErrorRaw::MAP { |
| 1926 | // If the bit is set... | 1926 | // If the bit is set... |
| 1927 | if self.0 | mask != 0 { | 1927 | if self.0 & mask != 0 { |
| 1928 | // clear the bit | 1928 | // clear the bit |
| 1929 | self.0 &= !mask; | 1929 | self.0 &= !mask; |
| 1930 | // and return the answer | 1930 | // and return the answer |