diff options
| -rw-r--r-- | embassy-embedded-hal/src/shared_bus/blocking/spi.rs | 98 |
1 files changed, 4 insertions, 94 deletions
diff --git a/embassy-embedded-hal/src/shared_bus/blocking/spi.rs b/embassy-embedded-hal/src/shared_bus/blocking/spi.rs index 7d383980d..8f1cce4ad 100644 --- a/embassy-embedded-hal/src/shared_bus/blocking/spi.rs +++ b/embassy-embedded-hal/src/shared_bus/blocking/spi.rs | |||
| @@ -28,33 +28,30 @@ use crate::shared_bus::SpiDeviceError; | |||
| 28 | use crate::SetConfig; | 28 | use crate::SetConfig; |
| 29 | 29 | ||
| 30 | /// SPI device on a shared bus. | 30 | /// SPI device on a shared bus. |
| 31 | pub struct SpiDevice<'a, M: RawMutex, BUS, CS, Word: Copy + 'static = u8> { | 31 | pub struct SpiDevice<'a, M: RawMutex, BUS, CS> { |
| 32 | bus: &'a Mutex<M, RefCell<BUS>>, | 32 | bus: &'a Mutex<M, RefCell<BUS>>, |
| 33 | cs: CS, | 33 | cs: CS, |
| 34 | _word: core::marker::PhantomData<Word>, | ||
| 35 | } | 34 | } |
| 36 | 35 | ||
| 37 | impl<'a, M: RawMutex, BUS, CS, Word: Copy + 'static> SpiDevice<'a, M, BUS, CS, Word> { | 36 | impl<'a, M: RawMutex, BUS, CS> SpiDevice<'a, M, BUS, CS, > { |
| 38 | /// Create a new `SpiDevice`. | 37 | /// Create a new `SpiDevice`. |
| 39 | pub fn new(bus: &'a Mutex<M, RefCell<BUS>>, cs: CS) -> Self { | 38 | pub fn new(bus: &'a Mutex<M, RefCell<BUS>>, cs: CS) -> Self { |
| 40 | Self { | 39 | Self { |
| 41 | bus, | 40 | bus, |
| 42 | cs, | 41 | cs, |
| 43 | _word: core::marker::PhantomData, | ||
| 44 | } | 42 | } |
| 45 | } | 43 | } |
| 46 | } | 44 | } |
| 47 | 45 | ||
| 48 | impl<'a, M: RawMutex, BUS, CS, Word> spi::ErrorType for SpiDevice<'a, M, BUS, CS, Word> | 46 | impl<'a, M: RawMutex, BUS, CS> spi::ErrorType for SpiDevice<'a, M, BUS, CS, > |
| 49 | where | 47 | where |
| 50 | BUS: spi::ErrorType, | 48 | BUS: spi::ErrorType, |
| 51 | CS: OutputPin, | 49 | CS: OutputPin, |
| 52 | Word: Copy + 'static, | ||
| 53 | { | 50 | { |
| 54 | type Error = SpiDeviceError<BUS::Error, CS::Error>; | 51 | type Error = SpiDeviceError<BUS::Error, CS::Error>; |
| 55 | } | 52 | } |
| 56 | 53 | ||
| 57 | impl<BUS, M, CS, Word> embedded_hal_1::spi::SpiDevice<Word> for SpiDevice<'_, M, BUS, CS, Word> | 54 | impl<BUS, M, CS, Word> embedded_hal_1::spi::SpiDevice<Word> for SpiDevice<'_, M, BUS, CS, > |
| 58 | where | 55 | where |
| 59 | M: RawMutex, | 56 | M: RawMutex, |
| 60 | BUS: SpiBus<Word>, | 57 | BUS: SpiBus<Word>, |
| @@ -97,93 +94,6 @@ where | |||
| 97 | } | 94 | } |
| 98 | } | 95 | } |
| 99 | 96 | ||
| 100 | impl<'d, M, BUS, CS, BusErr, CsErr, Word> embedded_hal_02::blocking::spi::Transfer<u8> | ||
| 101 | for SpiDevice<'_, M, BUS, CS, Word> | ||
| 102 | where | ||
| 103 | M: RawMutex, | ||
| 104 | BUS: embedded_hal_02::blocking::spi::Transfer<u8, Error = BusErr>, | ||
| 105 | CS: OutputPin<Error = CsErr>, | ||
| 106 | Word: Copy + 'static, | ||
| 107 | { | ||
| 108 | type Error = SpiDeviceError<BusErr, CsErr>; | ||
| 109 | fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> { | ||
| 110 | self.bus.lock(|bus| { | ||
| 111 | let mut bus = bus.borrow_mut(); | ||
| 112 | self.cs.set_low().map_err(SpiDeviceError::Cs)?; | ||
| 113 | let op_res = bus.transfer(words); | ||
| 114 | let cs_res = self.cs.set_high(); | ||
| 115 | let op_res = op_res.map_err(SpiDeviceError::Spi)?; | ||
| 116 | cs_res.map_err(SpiDeviceError::Cs)?; | ||
| 117 | Ok(op_res) | ||
| 118 | }) | ||
| 119 | } | ||
| 120 | } | ||
| 121 | |||
| 122 | impl<'d, M, BUS, CS, BusErr, CsErr, Word> embedded_hal_02::blocking::spi::Write<u8> for SpiDevice<'_, M, BUS, CS, Word> | ||
| 123 | where | ||
| 124 | M: RawMutex, | ||
| 125 | BUS: embedded_hal_02::blocking::spi::Write<u8, Error = BusErr>, | ||
| 126 | CS: OutputPin<Error = CsErr>, | ||
| 127 | Word: Copy + 'static, | ||
| 128 | { | ||
| 129 | type Error = SpiDeviceError<BusErr, CsErr>; | ||
| 130 | |||
| 131 | fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> { | ||
| 132 | self.bus.lock(|bus| { | ||
| 133 | let mut bus = bus.borrow_mut(); | ||
| 134 | self.cs.set_low().map_err(SpiDeviceError::Cs)?; | ||
| 135 | let op_res = bus.write(words); | ||
| 136 | let cs_res = self.cs.set_high(); | ||
| 137 | let op_res = op_res.map_err(SpiDeviceError::Spi)?; | ||
| 138 | cs_res.map_err(SpiDeviceError::Cs)?; | ||
| 139 | Ok(op_res) | ||
| 140 | }) | ||
| 141 | } | ||
| 142 | } | ||
| 143 | |||
| 144 | impl<'d, M, BUS, CS, BusErr, CsErr, Word> embedded_hal_02::blocking::spi::Transfer<u16> | ||
| 145 | for SpiDevice<'_, M, BUS, CS, Word> | ||
| 146 | where | ||
| 147 | M: RawMutex, | ||
| 148 | BUS: embedded_hal_02::blocking::spi::Transfer<u16, Error = BusErr>, | ||
| 149 | CS: OutputPin<Error = CsErr>, | ||
| 150 | Word: Copy + 'static, | ||
| 151 | { | ||
| 152 | type Error = SpiDeviceError<BusErr, CsErr>; | ||
| 153 | fn transfer<'w>(&mut self, words: &'w mut [u16]) -> Result<&'w [u16], Self::Error> { | ||
| 154 | self.bus.lock(|bus| { | ||
| 155 | let mut bus = bus.borrow_mut(); | ||
| 156 | self.cs.set_low().map_err(SpiDeviceError::Cs)?; | ||
| 157 | let op_res = bus.transfer(words); | ||
| 158 | let cs_res = self.cs.set_high(); | ||
| 159 | let op_res = op_res.map_err(SpiDeviceError::Spi)?; | ||
| 160 | cs_res.map_err(SpiDeviceError::Cs)?; | ||
| 161 | Ok(op_res) | ||
| 162 | }) | ||
| 163 | } | ||
| 164 | } | ||
| 165 | |||
| 166 | impl<'d, M, BUS, CS, BusErr, CsErr, Word> embedded_hal_02::blocking::spi::Write<u16> for SpiDevice<'_, M, BUS, CS, Word> | ||
| 167 | where | ||
| 168 | M: RawMutex, | ||
| 169 | BUS: embedded_hal_02::blocking::spi::Write<u16, Error = BusErr>, | ||
| 170 | CS: OutputPin<Error = CsErr>, | ||
| 171 | Word: Copy + 'static, | ||
| 172 | { | ||
| 173 | type Error = SpiDeviceError<BusErr, CsErr>; | ||
| 174 | |||
| 175 | fn write(&mut self, words: &[u16]) -> Result<(), Self::Error> { | ||
| 176 | self.bus.lock(|bus| { | ||
| 177 | let mut bus = bus.borrow_mut(); | ||
| 178 | self.cs.set_low().map_err(SpiDeviceError::Cs)?; | ||
| 179 | let op_res = bus.write(words); | ||
| 180 | let cs_res = self.cs.set_high(); | ||
| 181 | let op_res = op_res.map_err(SpiDeviceError::Spi)?; | ||
| 182 | cs_res.map_err(SpiDeviceError::Cs)?; | ||
| 183 | Ok(op_res) | ||
| 184 | }) | ||
| 185 | } | ||
| 186 | } | ||
| 187 | 97 | ||
| 188 | /// SPI device on a shared bus, with its own configuration. | 98 | /// SPI device on a shared bus, with its own configuration. |
| 189 | /// | 99 | /// |
