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-rw-r--r--embassy-nrf/src/twis.rs48
1 files changed, 33 insertions, 15 deletions
diff --git a/embassy-nrf/src/twis.rs b/embassy-nrf/src/twis.rs
index dd4978b3e..b3a699f71 100644
--- a/embassy-nrf/src/twis.rs
+++ b/embassy-nrf/src/twis.rs
@@ -2,10 +2,10 @@
2 2
3#![macro_use] 3#![macro_use]
4 4
5use core::future::{poll_fn, Future}; 5use core::future::{Future, poll_fn};
6use core::marker::PhantomData; 6use core::marker::PhantomData;
7use core::sync::atomic::compiler_fence;
8use core::sync::atomic::Ordering::SeqCst; 7use core::sync::atomic::Ordering::SeqCst;
8use core::sync::atomic::compiler_fence;
9use core::task::Poll; 9use core::task::Poll;
10 10
11use embassy_hal_internal::{Peri, PeripheralType}; 11use embassy_hal_internal::{Peri, PeripheralType};
@@ -161,10 +161,19 @@ impl<'d> Twis<'d> {
161 sda.conf().write(|w| { 161 sda.conf().write(|w| {
162 w.set_dir(gpiovals::Dir::INPUT); 162 w.set_dir(gpiovals::Dir::INPUT);
163 w.set_input(gpiovals::Input::CONNECT); 163 w.set_input(gpiovals::Input::CONNECT);
164 #[cfg(not(feature = "_nrf54l"))]
164 w.set_drive(match config.sda_high_drive { 165 w.set_drive(match config.sda_high_drive {
165 true => gpiovals::Drive::H0D1, 166 true => gpiovals::Drive::H0D1,
166 false => gpiovals::Drive::S0D1, 167 false => gpiovals::Drive::S0D1,
167 }); 168 });
169 #[cfg(feature = "_nrf54l")]
170 {
171 w.set_drive0(match config.sda_high_drive {
172 true => gpiovals::Drive::H,
173 false => gpiovals::Drive::S,
174 });
175 w.set_drive1(gpiovals::Drive::D);
176 }
168 if config.sda_pullup { 177 if config.sda_pullup {
169 w.set_pull(gpiovals::Pull::PULLUP); 178 w.set_pull(gpiovals::Pull::PULLUP);
170 } 179 }
@@ -172,10 +181,19 @@ impl<'d> Twis<'d> {
172 scl.conf().write(|w| { 181 scl.conf().write(|w| {
173 w.set_dir(gpiovals::Dir::INPUT); 182 w.set_dir(gpiovals::Dir::INPUT);
174 w.set_input(gpiovals::Input::CONNECT); 183 w.set_input(gpiovals::Input::CONNECT);
184 #[cfg(not(feature = "_nrf54l"))]
175 w.set_drive(match config.scl_high_drive { 185 w.set_drive(match config.scl_high_drive {
176 true => gpiovals::Drive::H0D1, 186 true => gpiovals::Drive::H0D1,
177 false => gpiovals::Drive::S0D1, 187 false => gpiovals::Drive::S0D1,
178 }); 188 });
189 #[cfg(feature = "_nrf54l")]
190 {
191 w.set_drive0(match config.scl_high_drive {
192 true => gpiovals::Drive::H,
193 false => gpiovals::Drive::S,
194 });
195 w.set_drive1(gpiovals::Drive::D);
196 }
179 if config.sda_pullup { 197 if config.sda_pullup {
180 w.set_pull(gpiovals::Pull::PULLUP); 198 w.set_pull(gpiovals::Pull::PULLUP);
181 } 199 }
@@ -228,8 +246,8 @@ impl<'d> Twis<'d> {
228 // We're giving the register a pointer to the stack. Since we're 246 // We're giving the register a pointer to the stack. Since we're
229 // waiting for the I2C transaction to end before this stack pointer 247 // waiting for the I2C transaction to end before this stack pointer
230 // becomes invalid, there's nothing wrong here. 248 // becomes invalid, there's nothing wrong here.
231 r.txd().ptr().write_value(buffer.as_ptr() as u32); 249 r.dma().tx().ptr().write_value(buffer.as_ptr() as u32);
232 r.txd().maxcnt().write(|w| 250 r.dma().tx().maxcnt().write(|w|
233 // We're giving it the length of the buffer, so no danger of 251 // We're giving it the length of the buffer, so no danger of
234 // accessing invalid memory. We have verified that the length of the 252 // accessing invalid memory. We have verified that the length of the
235 // buffer fits in an `u8`, so the cast to `u8` is also fine. 253 // buffer fits in an `u8`, so the cast to `u8` is also fine.
@@ -255,8 +273,8 @@ impl<'d> Twis<'d> {
255 // We're giving the register a pointer to the stack. Since we're 273 // We're giving the register a pointer to the stack. Since we're
256 // waiting for the I2C transaction to end before this stack pointer 274 // waiting for the I2C transaction to end before this stack pointer
257 // becomes invalid, there's nothing wrong here. 275 // becomes invalid, there's nothing wrong here.
258 r.rxd().ptr().write_value(buffer.as_mut_ptr() as u32); 276 r.dma().rx().ptr().write_value(buffer.as_mut_ptr() as u32);
259 r.rxd().maxcnt().write(|w| 277 r.dma().rx().maxcnt().write(|w|
260 // We're giving it the length of the buffer, so no danger of 278 // We're giving it the length of the buffer, so no danger of
261 // accessing invalid memory. We have verified that the length of the 279 // accessing invalid memory. We have verified that the length of the
262 // buffer fits in an `u8`, so the cast to the type of maxcnt 280 // buffer fits in an `u8`, so the cast to the type of maxcnt
@@ -330,13 +348,13 @@ impl<'d> Twis<'d> {
330 return match status { 348 return match status {
331 Status::Read => Ok(Command::Read), 349 Status::Read => Ok(Command::Read),
332 Status::Write => { 350 Status::Write => {
333 let n = r.rxd().amount().read().0 as usize; 351 let n = r.dma().rx().amount().read().0 as usize;
334 Ok(Command::Write(n)) 352 Ok(Command::Write(n))
335 } 353 }
336 }; 354 };
337 } else if r.events_read().read() != 0 { 355 } else if r.events_read().read() != 0 {
338 r.events_read().write_value(0); 356 r.events_read().write_value(0);
339 let n = r.rxd().amount().read().0 as usize; 357 let n = r.dma().rx().amount().read().0 as usize;
340 return Ok(Command::WriteRead(n)); 358 return Ok(Command::WriteRead(n));
341 } 359 }
342 } 360 }
@@ -360,7 +378,7 @@ impl<'d> Twis<'d> {
360 } 378 }
361 } else if r.events_stopped().read() != 0 { 379 } else if r.events_stopped().read() != 0 {
362 r.events_stopped().write_value(0); 380 r.events_stopped().write_value(0);
363 let n = r.txd().amount().read().0 as usize; 381 let n = r.dma().tx().amount().read().0 as usize;
364 return Ok(n); 382 return Ok(n);
365 } 383 }
366 } 384 }
@@ -386,7 +404,7 @@ impl<'d> Twis<'d> {
386 } 404 }
387 } else if r.events_stopped().read() != 0 { 405 } else if r.events_stopped().read() != 0 {
388 r.events_stopped().write_value(0); 406 r.events_stopped().write_value(0);
389 let n = r.txd().amount().read().0 as usize; 407 let n = r.dma().tx().amount().read().0 as usize;
390 return Ok(n); 408 return Ok(n);
391 } else if Instant::now() > deadline { 409 } else if Instant::now() > deadline {
392 r.tasks_stop().write_value(1); 410 r.tasks_stop().write_value(1);
@@ -442,13 +460,13 @@ impl<'d> Twis<'d> {
442 return match status { 460 return match status {
443 Status::Read => Ok(Command::Read), 461 Status::Read => Ok(Command::Read),
444 Status::Write => { 462 Status::Write => {
445 let n = r.rxd().amount().read().0 as usize; 463 let n = r.dma().rx().amount().read().0 as usize;
446 Ok(Command::Write(n)) 464 Ok(Command::Write(n))
447 } 465 }
448 }; 466 };
449 } else if r.events_read().read() != 0 { 467 } else if r.events_read().read() != 0 {
450 r.events_read().write_value(0); 468 r.events_read().write_value(0);
451 let n = r.rxd().amount().read().0 as usize; 469 let n = r.dma().rx().amount().read().0 as usize;
452 return Ok(Command::WriteRead(n)); 470 return Ok(Command::WriteRead(n));
453 } else if Instant::now() > deadline { 471 } else if Instant::now() > deadline {
454 r.tasks_stop().write_value(1); 472 r.tasks_stop().write_value(1);
@@ -478,7 +496,7 @@ impl<'d> Twis<'d> {
478 } 496 }
479 } else if r.events_stopped().read() != 0 { 497 } else if r.events_stopped().read() != 0 {
480 r.events_stopped().write_value(0); 498 r.events_stopped().write_value(0);
481 let n = r.txd().amount().read().0 as usize; 499 let n = r.dma().tx().amount().read().0 as usize;
482 return Poll::Ready(Ok(n)); 500 return Poll::Ready(Ok(n));
483 } 501 }
484 502
@@ -529,13 +547,13 @@ impl<'d> Twis<'d> {
529 return match status { 547 return match status {
530 Status::Read => Poll::Ready(Ok(Command::Read)), 548 Status::Read => Poll::Ready(Ok(Command::Read)),
531 Status::Write => { 549 Status::Write => {
532 let n = r.rxd().amount().read().0 as usize; 550 let n = r.dma().rx().amount().read().0 as usize;
533 Poll::Ready(Ok(Command::Write(n))) 551 Poll::Ready(Ok(Command::Write(n)))
534 } 552 }
535 }; 553 };
536 } else if r.events_read().read() != 0 { 554 } else if r.events_read().read() != 0 {
537 r.events_read().write_value(0); 555 r.events_read().write_value(0);
538 let n = r.rxd().amount().read().0 as usize; 556 let n = r.dma().rx().amount().read().0 as usize;
539 return Poll::Ready(Ok(Command::WriteRead(n))); 557 return Poll::Ready(Ok(Command::WriteRead(n)));
540 } 558 }
541 Poll::Pending 559 Poll::Pending