1 files changed, 133 insertions, 90 deletions

diff --git a/embassy-stm32/src/adc/mod.rs b/embassy-stm32/src/adc/mod.rs
index 9040eefe5..a6af1175a 100644
--- a/embassy-stm32/src/adc/mod.rs
+++ b/embassy-stm32/src/adc/mod.rs
@@ -32,6 +32,11 @@ use embassy_sync::waitqueue::AtomicWaker;
 #[cfg(any(adc_v2, adc_g4, adc_v3, adc_g0, adc_u0))]
 pub use ringbuffered::RingBufferedAdc;
 
+#[cfg(adc_u5)]
+use crate::pac::adc::vals::Adc4SampleTime;
+#[cfg(adc_wba)]
+use crate::pac::adc::vals::SampleTime as Adc4SampleTime;
+
 #[cfg(any(adc_u5, adc_wba))]
 #[path = "adc4.rs"]
 pub mod adc4;
@@ -44,10 +49,10 @@ pub use crate::pac::adc::vals::Res as Resolution;
 pub use crate::pac::adc::vals::SampleTime;
 use crate::peripherals;
 
-dma_trait!(RxDma, AnyInstance);
+dma_trait!(RxDma, Instance);
 
 /// Analog to Digital driver.
-pub struct Adc<'d, T: AnyInstance> {
+pub struct Adc<'d, T: Instance> {
     #[allow(unused)]
     adc: crate::Peri<'d, T>,
 }
@@ -66,10 +71,53 @@ impl State {
     }
 }
 
-trait SealedInstance {
-    #[cfg(not(adc_wba))]
-    #[allow(unused)]
+#[cfg(any(adc_f1, adc_f3v1, adc_f3v2, adc_v1, adc_l0))]
+trait_set::trait_set! {
+    pub trait DefaultInstance = Instance;
+}
+
+#[cfg(any(adc_v2, adc_v3, adc_g0, adc_h5, adc_h7rs, adc_u0, adc_v4, adc_u5, adc_g4, adc_c0))]
+trait_set::trait_set! {
+    pub trait DefaultInstance = Instance<Regs = crate::pac::adc::Adc>;
+}
+
+#[cfg(adc_wba)]
+trait_set::trait_set! {
+    pub trait DefaultInstance = Instance<Regs = crate::pac::adc::Adc4>;
+}
+
+pub trait BasicAdcRegs {
+    type SampleTime;
+}
+
+#[cfg(any(
+    adc_v2, adc_v3, adc_g0, adc_h5, adc_h7rs, adc_u0, adc_v4, adc_u5, adc_wba, adc_g4, adc_c0
+))]
+trait AdcRegs: BasicAdcRegs {
+    fn enable(&self);
+    fn start(&self);
+    fn stop(&self);
+    fn convert(&self);
+    fn configure_dma(&self, conversion_mode: ConversionMode);
+    fn configure_sequence(&self, sequence: impl ExactSizeIterator<Item = ((u8, bool), Self::SampleTime)>);
+    fn data(&self) -> *mut u16;
+}
+
+#[allow(private_bounds)]
+pub trait BasicInstance {
+    #[cfg(any(
+        adc_v2, adc_v3, adc_g0, adc_h5, adc_h7rs, adc_u0, adc_v4, adc_u5, adc_wba, adc_g4, adc_c0
+    ))]
+    type Regs: AdcRegs;
+}
+
+trait SealedInstance: BasicInstance {
+    #[cfg(any(adc_f1, adc_f3v1, adc_f3v2, adc_v1, adc_l0))]
     fn regs() -> crate::pac::adc::Adc;
+    #[cfg(any(
+        adc_v2, adc_v3, adc_g0, adc_h5, adc_h7rs, adc_u0, adc_v4, adc_u5, adc_wba, adc_g4, adc_c0
+    ))]
+    fn regs() -> Self::Regs;
     #[cfg(not(any(adc_f1, adc_v1, adc_l0, adc_f3v3, adc_f3v2, adc_g0)))]
     #[allow(unused)]
     fn common_regs() -> crate::pac::adccommon::AdcCommon;
@@ -90,56 +138,6 @@ pub(crate) trait SealedAdcChannel<T> {
     }
 }
 
-// Temporary patch for ADCs that have not implemented the standard iface yet
-#[cfg(any(adc_v1, adc_l0, adc_f1, adc_f3v1, adc_f3v2, adc_f3v3, adc_v1))]
-trait_set::trait_set! {
-    pub trait AnyInstance = Instance;
-}
-
-#[cfg(any(
-    adc_v2, adc_v3, adc_g0, adc_h5, adc_h7rs, adc_u0, adc_v4, adc_u5, adc_wba, adc_g4, adc_c0
-))]
-pub trait BasicAnyInstance {
-    type SampleTime;
-}
-
-#[cfg(any(
-    adc_v2, adc_v3, adc_g0, adc_h5, adc_h7rs, adc_u0, adc_v4, adc_u5, adc_wba, adc_g4, adc_c0
-))]
-pub(self) trait SealedAnyInstance: BasicAnyInstance {
-    fn enable();
-    fn start();
-    fn stop();
-    fn convert() -> u16;
-    fn configure_dma(conversion_mode: ConversionMode);
-    fn configure_sequence(sequence: impl ExactSizeIterator<Item = ((u8, bool), Self::SampleTime)>);
-    #[allow(dead_code)]
-    fn dr() -> *mut u16;
-}
-
-// On chips without ADC4, AnyInstance is an Instance
-#[cfg(any(adc_v2, adc_v3, adc_g0, adc_h5, adc_h7rs, adc_u0, adc_g4, adc_c0))]
-#[allow(private_bounds)]
-pub trait AnyInstance: SealedAnyInstance + Instance {}
-
-// On chips with ADC4, AnyInstance is an Instance or adc4::Instance
-#[cfg(any(adc_v4, adc_u5, adc_wba))]
-#[allow(private_bounds)]
-pub trait AnyInstance: SealedAnyInstance + crate::PeripheralType + crate::rcc::RccPeripheral {}
-
-// Implement AnyInstance automatically for SealedAnyInstance
-#[cfg(any(
-    adc_v2, adc_v3, adc_g0, adc_h5, adc_h7rs, adc_u0, adc_v4, adc_u5, adc_wba, adc_g4, adc_c0
-))]
-impl<T: SealedAnyInstance + Instance> BasicAnyInstance for T {
-    type SampleTime = SampleTime;
-}
-
-#[cfg(any(
-    adc_v2, adc_v3, adc_g0, adc_h5, adc_h7rs, adc_u0, adc_v4, adc_u5, adc_wba, adc_g4, adc_c0
-))]
-impl<T: SealedAnyInstance + Instance> AnyInstance for T {}
-
 #[cfg(any(adc_c0, adc_v3, adc_g0, adc_h5, adc_h7rs, adc_u0, adc_v4, adc_u5))]
 /// Number of samples used for averaging.
 #[derive(Copy, Clone, Debug)]
@@ -184,28 +182,33 @@ pub enum RegularConversionMode {
     Triggered(ConversionTrigger),
 }
 
-impl<'d, T: AnyInstance> Adc<'d, T> {
+impl<'d, T: Instance> Adc<'d, T> {
     #[cfg(any(
         adc_v2, adc_g4, adc_v3, adc_g0, adc_h5, adc_h7rs, adc_u0, adc_u5, adc_v3, adc_v4, adc_wba, adc_c0
     ))]
     /// Read an ADC pin.
-    pub fn blocking_read(&mut self, channel: &mut impl AdcChannel<T>, sample_time: T::SampleTime) -> u16 {
+    pub fn blocking_read(
+        &mut self,
+        channel: &mut impl AdcChannel<T>,
+        sample_time: <T::Regs as BasicAdcRegs>::SampleTime,
+    ) -> u16 {
         #[cfg(any(adc_v1, adc_c0, adc_l0, adc_v2, adc_g4, adc_v3, adc_v4, adc_u5, adc_wba))]
         channel.setup();
 
         // Ensure no conversions are ongoing
-        T::stop();
+        T::regs().stop();
         #[cfg(any(adc_v2, adc_v3, adc_g0, adc_h7rs, adc_u0, adc_u5, adc_wba, adc_c0))]
-        T::enable();
-        T::configure_sequence([((channel.channel(), channel.is_differential()), sample_time)].into_iter());
+        T::regs().enable();
+        T::regs().configure_sequence([((channel.channel(), channel.is_differential()), sample_time)].into_iter());
 
         // On chips with differential channels, enable after configure_sequence to allow setting differential channels
         //
         // TODO: If hardware allows, enable after configure_sequence on all chips
         #[cfg(any(adc_g4, adc_h5))]
-        T::enable();
+        T::regs().enable();
+        T::regs().convert();
 
-        T::convert()
+        unsafe { *T::regs().data() }
     }
 
     #[cfg(any(adc_g4, adc_v3, adc_g0, adc_h5, adc_h7rs, adc_u0, adc_v4, adc_u5, adc_wba, adc_c0))]
@@ -245,7 +248,7 @@ impl<'d, T: AnyInstance> Adc<'d, T> {
     pub async fn read<'a, 'b: 'a>(
         &mut self,
         rx_dma: embassy_hal_internal::Peri<'_, impl RxDma<T>>,
-        sequence: impl ExactSizeIterator<Item = (&'a mut AnyAdcChannel<'b, T>, T::SampleTime)>,
+        sequence: impl ExactSizeIterator<Item = (&'a mut AnyAdcChannel<'b, T>, <T::Regs as BasicAdcRegs>::SampleTime)>,
         readings: &mut [u16],
     ) {
         assert!(sequence.len() != 0, "Asynchronous read sequence cannot be empty");
@@ -259,11 +262,11 @@ impl<'d, T: AnyInstance> Adc<'d, T> {
         );
 
         // Ensure no conversions are ongoing
-        T::stop();
+        T::regs().stop();
         #[cfg(any(adc_g0, adc_v3, adc_h7rs, adc_u0, adc_v4, adc_u5, adc_wba, adc_c0))]
-        T::enable();
+        T::regs().enable();
 
-        T::configure_sequence(
+        T::regs().configure_sequence(
             sequence.map(|(channel, sample_time)| ((channel.channel, channel.is_differential), sample_time)),
         );
 
@@ -271,20 +274,20 @@ impl<'d, T: AnyInstance> Adc<'d, T> {
         //
         // TODO: If hardware allows, enable after configure_sequence on all chips
         #[cfg(any(adc_g4, adc_h5))]
-        T::enable();
-        T::configure_dma(ConversionMode::Singular);
+        T::regs().enable();
+        T::regs().configure_dma(ConversionMode::Singular);
 
         let request = rx_dma.request();
         let transfer =
-            unsafe { crate::dma::Transfer::new_read(rx_dma, request, T::dr(), readings, Default::default()) };
+            unsafe { crate::dma::Transfer::new_read(rx_dma, request, T::regs().data(), readings, Default::default()) };
 
-        T::start();
+        T::regs().start();
 
         // Wait for conversion sequence to finish.
         transfer.await;
 
         // Ensure conversions are finished.
-        T::stop();
+        T::regs().stop();
     }
 
     #[cfg(any(adc_v2, adc_g4, adc_v3, adc_g0, adc_u0))]
@@ -318,7 +321,7 @@ impl<'d, T: AnyInstance> Adc<'d, T> {
         self,
         dma: embassy_hal_internal::Peri<'a, impl RxDma<T>>,
         dma_buf: &'a mut [u16],
-        sequence: impl ExactSizeIterator<Item = (AnyAdcChannel<'b, T>, T::SampleTime)>,
+        sequence: impl ExactSizeIterator<Item = (AnyAdcChannel<'b, T>, <T::Regs as BasicAdcRegs>::SampleTime)>,
         mode: RegularConversionMode,
     ) -> RingBufferedAdc<'a, T> {
         assert!(!dma_buf.is_empty() && dma_buf.len() <= 0xFFFF);
@@ -328,11 +331,11 @@ impl<'d, T: AnyInstance> Adc<'d, T> {
             "Asynchronous read sequence cannot be more than 16 in length"
         );
         // Ensure no conversions are ongoing
-        T::stop();
+        T::regs().stop();
         #[cfg(any(adc_g0, adc_v3, adc_h7rs, adc_u0, adc_v4, adc_u5, adc_wba, adc_c0))]
-        T::enable();
+        T::regs().enable();
 
-        T::configure_sequence(
+        T::regs().configure_sequence(
             sequence.map(|(channel, sample_time)| ((channel.channel, channel.is_differential), sample_time)),
         );
 
@@ -340,8 +343,8 @@ impl<'d, T: AnyInstance> Adc<'d, T> {
         //
         // TODO: If hardware allows, enable after configure_sequence on all chips
         #[cfg(any(adc_g4, adc_h5))]
-        T::enable();
-        T::configure_dma(ConversionMode::Repeated(mode));
+        T::regs().enable();
+        T::regs().configure_dma(ConversionMode::Repeated(mode));
 
         core::mem::forget(self);
 
@@ -442,8 +445,8 @@ pub struct AnyAdcChannel<'a, T> {
     is_differential: bool,
     _phantom: PhantomData<&'a mut T>,
 }
-impl<T: AnyInstance> AdcChannel<T> for AnyAdcChannel<'_, T> {}
-impl<T: AnyInstance> SealedAdcChannel<T> for AnyAdcChannel<'_, T> {
+impl<T: Instance> AdcChannel<T> for AnyAdcChannel<'_, T> {}
+impl<T: Instance> SealedAdcChannel<T> for AnyAdcChannel<'_, T> {
     fn channel(&self) -> u8 {
         self.channel
     }
@@ -459,16 +462,35 @@ impl<T> AnyAdcChannel<'_, T> {
         self.channel
     }
 }
+
+#[cfg(not(adc_wba))]
+impl BasicAdcRegs for crate::pac::adc::Adc {
+    type SampleTime = SampleTime;
+}
+
+#[cfg(any(adc_wba, adc_u5))]
+impl BasicAdcRegs for crate::pac::adc::Adc4 {
+    type SampleTime = Adc4SampleTime;
+}
+
 #[cfg(adc_wba)]
 foreach_adc!(
     (ADC4, $common_inst:ident, $clock:ident) => {
-        impl crate::adc::adc4::SealedInstance for peripherals::ADC4 {
-            fn regs() -> crate::pac::adc::Adc4 {
+        impl crate::adc::BasicInstance for peripherals::ADC4 {
+            type Regs = crate::pac::adc::Adc4;
+        }
+
+        impl crate::adc::SealedInstance for peripherals::ADC4 {
+            fn regs() -> Self::Regs {
                 crate::pac::ADC4
             }
+
+            fn common_regs() -> crate::pac::adccommon::AdcCommon {
+                return crate::pac::$common_inst
+            }
         }
 
-        impl crate::adc::adc4::Instance for peripherals::ADC4 {
+        impl crate::adc::Instance for peripherals::ADC4 {
             type Interrupt = crate::_generated::peripheral_interrupts::ADC4::GLOBAL;
         }
     };
@@ -493,20 +515,32 @@ foreach_adc!(
 #[cfg(adc_u5)]
 foreach_adc!(
     (ADC4, $common_inst:ident, $clock:ident) => {
-        impl crate::adc::adc4::SealedInstance for peripherals::ADC4 {
-            fn regs() -> crate::pac::adc::Adc4 {
+        impl crate::adc::BasicInstance for peripherals::ADC4 {
+            type Regs = crate::pac::adc::Adc4;
+        }
+
+        impl crate::adc::SealedInstance for peripherals::ADC4 {
+            fn regs() -> Self::Regs {
                 crate::pac::ADC4
             }
+
+            fn common_regs() -> crate::pac::adccommon::AdcCommon {
+                return crate::pac::$common_inst
+            }
         }
 
-        impl crate::adc::adc4::Instance for peripherals::ADC4 {
+        impl crate::adc::Instance for peripherals::ADC4 {
             type Interrupt = crate::_generated::peripheral_interrupts::ADC4::GLOBAL;
         }
     };
 
     ($inst:ident, $common_inst:ident, $clock:ident) => {
+        impl crate::adc::BasicInstance for peripherals::$inst {
+            type Regs = crate::pac::adc::Adc;
+        }
+
         impl crate::adc::SealedInstance for peripherals::$inst {
-            fn regs() -> crate::pac::adc::Adc {
+            fn regs() -> Self::Regs {
                 crate::pac::$inst
             }
 
@@ -524,14 +558,23 @@ foreach_adc!(
 #[cfg(not(any(adc_u5, adc_wba)))]
 foreach_adc!(
     ($inst:ident, $common_inst:ident, $clock:ident) => {
+        impl crate::adc::BasicInstance for peripherals::$inst {
+            #[cfg(any(
+                adc_v2, adc_v3, adc_g0, adc_h5, adc_h7rs, adc_u0, adc_v4, adc_u5, adc_wba, adc_g4, adc_c0
+            ))]
+            type Regs = crate::pac::adc::Adc;
+        }
+
         impl crate::adc::SealedInstance for peripherals::$inst {
-            #[cfg(not(adc_wba))]
-            fn regs() -> crate::pac::adc::Adc {
+            #[cfg(any(
+                adc_v2, adc_v3, adc_g0, adc_h5, adc_h7rs, adc_u0, adc_v4, adc_u5, adc_wba, adc_g4, adc_c0
+            ))]
+            fn regs() -> Self::Regs {
                 crate::pac::$inst
             }
 
-            #[cfg(adc_wba)]
-            fn regs() -> crate::pac::adc::Adc4 {
+            #[cfg(any(adc_f1, adc_f3v1, adc_f3v2, adc_v1, adc_l0))]
+            fn regs() -> crate::pac::adc::Adc {
                 crate::pac::$inst
             }