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* Merge #1454bors[bot]2023-05-142-1/+107
|\ | | | | | | | | | | | | | | | | 1454: stm32f0 flash implementation r=Dirbaio a=jp99 i've copied and modified the f3 implementation and it seems to be working. Co-authored-by: Jaap Prickartz <[email protected]>
| * stm32f0 flash implementationJaap Prickartz2023-05-142-1/+107
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* | Merge #1453bors[bot]2023-05-142-33/+82
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | 1453: stm32 uart: Fix error flag handling for blocking operations r=Dirbaio a=timokroeger Clear and report the error flags one by one and pop the data byte only after all error flags were handled. For v1/v2 we emulate the v3/v4 behaviour by buffering the status register because a read to the data register clears all flags at once which means we might loose all but the first error. Only tested on stm32f3 discovery board with loopback. Let‘s see what CI says for the other families. Fixes #1452 Co-authored-by: Timo Kröger <[email protected]>
| * stm32 uart: Add a test for blocking RX overflowTimo Kröger2023-05-141-1/+21
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| * stm32 uart: Fix error flag handling for blocking operationsTimo Kröger2023-05-141-32/+61
|/ | | | | | | | | Clear and report the error flags one by one and pop the data byte only after all error flags were handled. For v1/v2 we emulate the v3/v4 behaviour by buffering the status register because a read to the data register clears all flags at once which means we might loose all but the first error.
* Merge #1448bors[bot]2023-05-137-20/+6
|\ | | | | | | | | | | | | | | | | | | 1448: rp: don't use SetConfig trait in PWM and PIO. r=Dirbaio a=Dirbaio It was intended to allow changing baudrate on shared spi/i2c. There's no advantage in using it for PWM or PIO, and makes it less usable because you have to have `embassy-embedded-hal` as a dep to use it. bors r+ Co-authored-by: Dario Nieuwenhuis <[email protected]>
| * rp: don't use SetConfig trait in PWM and PIO.Dario Nieuwenhuis2023-05-137-20/+6
|/ | | | | | It was intended to allow changing baudrate on shared spi/i2c. There's no advantage in using it for PWM or PIO, and makes it less usable because you have to have `embassy-embedded-hal` as a dep to use it.
* Merge #1447bors[bot]2023-05-121-7/+5
|\ | | | | | | | | | | | | | | 1447: rp/watchdog: fix overflow if period is longer than 4294 seconds. r=Dirbaio a=Dirbaio bors r+ Co-authored-by: Dario Nieuwenhuis <[email protected]>
| * rp/watchdog: fix overflow if period is longer than 4294 seconds.Dario Nieuwenhuis2023-05-131-7/+5
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* | Merge #1424bors[bot]2023-05-1117-22/+830
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | 1424: add TL maibox for stm32wb r=xoviat a=OueslatiGhaith Hello, This pull request is related to #1397 and #1401, inspired by #24, build upon the work done in #1405, and was tested on an stm32wb55rg. This pull request aims to add the transport layer mailbox for stm32wb microcontrollers. For now it's only capable of initializing it and getting the firmware information Co-authored-by: goueslati <[email protected]> Co-authored-by: Ghaith Oueslati <[email protected]> Co-authored-by: xoviat <[email protected]>
| * fix memory.xxoviat2023-05-111-4/+4
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| * rustfmtxoviat2023-05-111-3/+3
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| * stm32/ble: fix tests and add instructions to run examplexoviat2023-05-115-6/+44
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| * removed hardcoded addresses in memory.xgoueslati2023-05-044-39/+25
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| * Merge branch 'tl_mbox' of https://github.com/OueslatiGhaith/embassy into tl_mboxgoueslati2023-05-043-3/+58
| |\ | | | | | | | | | merge
| | * rustfmtxoviat2023-05-031-1/+0
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| | * stm32/tests: add hil test for blexoviat2023-05-033-2/+58
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| * fixed ble table cmd buffer being constantgoueslati2023-05-031-1/+1
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| * Merge branch 'tl_mbox' of https://github.com/OueslatiGhaith/embassy into tl_mboxgoueslati2023-05-022-9/+3
| |\ | | | | | | | | | merge
| | * Merge branch 'embassy-rs:master' into tl_mboxGhaith Oueslati2023-05-022-9/+3
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| * | | whoops, plugin formatted Cargo.toml, revertinggoueslati2023-05-021-1334/+1334
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| * | added TL Mailbox initialization for STM32WBgoueslati2023-05-0211-1334/+2063
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* | | Merge #1436bors[bot]2023-05-094-98/+734
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1436: rp: Clock configuration r=CBJamo a=CBJamo Draft of a more complete clock config for the 2040. I also extended and made public the clk_<name>_freq functions. I know at least the ws2812 pio example would like to get the sys clock at runtime rather than just using a constant. I suspect most pio-based peripherals will want access to the clocks. Open questions: 1. Best way to handle the 3 external clock frequencies. I think the XIN (aka crystal) freq should just be set by the init function then never changed, though if it's an external clock that could change? I'm not sure anyone would ever want to do that but maybe it should be handled just in case? The other two should probably be set by the application. 2. Better estimation of ROSC frequency. Right now it's really just a lookup table of the speed from the single sample I did this testing on, and only uses the frequency range and div, drive strength is ignored. 3. Probably some kind of warning should be generated if the random bit from the rosc won't be useful, not sure how to do that. 4. Should clocks only be allowed to be configured at init, or should they be modifiable at runtime? For example, switching the RTC to a clock in pin when a pps source is available. Bonus feature to support clock output. I only implemented the bare minimum, and only for gpout0. I'm sure there's a clean way with macros to impl all 4 without just copy/paste, but I haven't learned macros yet. Co-authored-by: Caleb Jamison <[email protected]>
| * \ \ Merge branch 'master' into masterCaleb Jamison2023-05-0936-51/+242
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* | | | Merge #1439bors[bot]2023-05-093-3/+36
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1439: rp: use rp2040-boot2 to provide the boot2 blob r=Dirbaio a=pennae we're currently shipping an old boot2 that runs the flash at half speed. use the more recent version instead, and allow user to choose between the different supported boot2 versions for different flash chips if they need that. Co-authored-by: pennae <[email protected]>
| * | | | rp: use rp2040-boot2 to provide the boot2 blobpennae2023-05-093-3/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | we're currently shipping an old boot2 that runs the flash at half speed. use the more recent version instead, and allow user to choose between the different supported boot2 versions for different flash chips if they need that.
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*-. \ \ \ \ Merge #1437 #1438bors[bot]2023-05-0830-47/+47
|\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1437: Fix some typos r=Dirbaio a=striezel This pull request fixes some typos, no functional changes intended. 1438: Update GitHub Actions CI r=Dirbaio a=striezel The following updates are performed: * update [`actions/cache`](https://github.com/actions/cache) to v3 * update [`actions/checkout`](https://github.com/actions/checkout) to v3 Still using the outdated actions will generate several warnings in CI runs, for example in https://github.com/embassy-rs/embassy/actions/runs/4917900672: > Node.js 12 actions are deprecated. Please update the following actions to use Node.js 16: actions/checkout@v2, actions/cache@v2. For more information see: https://github.blog/changelog/2022-09-22-github-actions-all-actions-will-begin-running-on-node16-instead-of-node12/. The PR will get rid of those warnings. Co-authored-by: Dirk Stolle <[email protected]>
| | * | | | | Update GitHub Actions CIDirk Stolle2023-05-082-6/+6
| |/ / / / / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following updates are performed: * update actions/cache to v3 * update actions/checkout to v3
| * | | | | Fix some typosDirk Stolle2023-05-0828-41/+41
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* | | | | Merge #1435bors[bot]2023-05-084-2/+160
|\ \ \ \ \ | |/ / / / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1435: Added example for multi priority executors rp2040 r=Dirbaio a=fakusb I added an example for multiple priorities of tasks on rp2040 by adjusting [examples/nrf52840/src/bin/multiprio.rs](https://github.com/embassy-rs/embassy/blob/master/examples/nrf52840/src/bin/multiprio.rs) . This needs https://github.com/embassy-rs/rp-pac/pull/2 , and this commit also adds the 6 new interrupt handlers for software interrupts to embassy-rs. We might need to change the git path for rp-pac in [embassy-rp/Cargo.toml](https://github.com/embassy-rs/embassy/compare/master...fakusb:rp2040-multiprio-executor?expand=1#diff-47463ea358745927ecdb686f52feab816fde5d402a9628a136c116f34a802ab0) Closes #1413 Co-authored-by: Fabian Kunze <[email protected]>
| * | | | bumped rp-pac versionFabian Kunze2023-05-081-1/+1
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| * | | | changed relative cargo.toml dependency to github revisionFabian Kunze2023-05-071-1/+1
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| * | | | added example multi priority executors rp2040Fabian Kunze2023-05-074-2/+160
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| | * | | Dirbaio comments round 2Caleb Jamison2023-05-092-94/+107
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| | * | | Remove patches, bump rp-pac versionCaleb Jamison2023-05-092-7/+1
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| | * | | Improve gpout example, clk_gpout_freqCaleb Jamison2023-05-093-10/+26
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| | * | | Gpout cleanup, basic Gpin supportCaleb Jamison2023-05-092-61/+106
| | | | | | | | | | | | | | | | | | | | Requires rp-pac #3
| | * | | Address Dirbaio commentsCaleb Jamison2023-05-081-94/+147
| | | | | | | | | | | | | | | | | | | | Gpout still incomplete.
| | * | | Add missing functions, Cleanup, Gpout exampleCaleb Jamison2023-05-082-53/+227
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| | * | | rp clock configurationCaleb Jamison2023-05-082-95/+436
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* | | | Merge #1434bors[bot]2023-05-088-496/+564
|\ \ \ \ | |/ / / |/| | | | | | | | | | | | | | | | | | | | | | | 1434: rp pio IV (the voyage home) r=Dirbaio a=pennae this should hopefully be the last entry in this series. after this we'll have a reasonably safe interface to pio, both for configuration and at runtime. pio now looks very much like the other peripherals (though not exactly, seeing how state machines can't be constructed from a config but only have it applied to them later). the generated code for `StateMachine::set_config` is still larger than we'd like (almost 300 bytes at Oz), but it's a great step up in safety from the previous interface at approximately the same code space cost. Co-authored-by: pennae <[email protected]>
| * | | rp/pio: make sure gpio() asserts are compiled outpennae2023-05-061-1/+2
| | | | | | | | | | | | | | | | | | | | we'll have to touch pio one way or other if the number of gpio pins ever increases. may as well make sure an assert never fires until that happens.
| * | | rp/pio: allow wrap-around program loadingpennae2023-05-063-13/+11
| | | | | | | | | | | | | | | | | | | | | | | | execution wraps around after the end of instruction memory and wrapping works with this, so we may as well allow program loading across this boundary. could be useful for reusing chunks of instruction memory.
| * | | rp/pio: mark exec_instr as unsafepennae2023-05-061-4/+2
| | | | | | | | | | | | | | | | because it most definitely is.
| * | | rp/pio: add sm batch operationspennae2023-05-061-0/+41
| | | | | | | | | | | | | | | | | | | | | | | | sometimes state machines need to be started, restarted, or synchronized at exactly the same time. the current interface does not allow this but the hardware does, so let's expose that.
| * | | rp/pio: configure state machines with Config structpennae2023-05-066-285/+300
| | | | | | | | | | | | | | | | | | | | | | | | the many individual sets aren't very efficient, and almost no checks were done to ensure that the configuration written to the hardware was actually valid. this adresses both of these.
| * | | rp/pio: mark pio_instr_util unsafepennae2023-05-061-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | none of these are safe. the x/y functions mangle the fifos, the set functions require the state machine to be stopped to be in any way safe, the out functions do both of those things at once. only the jump instruction is marginally safe, but running this on an active program is bound to cause problems.
| * | | rp/pio: add set-pin-{values,dirs} convenience functionspennae2023-05-062-8/+61
| | | | | | | | | | | | | | | | | | | | these are needed a lot during state machine setup, it makes sense to provide convenience functions for them.
| * | | rp/pio: add load_program, use_programpennae2023-05-065-115/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | programs contain information we could pull from them directly and use to validate other configuration of the state machine instead of asking the user to pull them out and hand them to us bit by bit. unfortunately programs do not specify how many in or out bits they use, so we can only handle side-set and wrapping jumps like this. it's still something though.
| * | | rp/pio: only clear diag bits if they're setpennae2023-05-051-4/+12
| | | | | | | | | | | | | | | | | | | | otherwise we may lose a bit being raised after it was read, but before it was cleared.
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