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path: root/embassy-rp/src/uart/buffered.rs
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* Remove atomic-polyfillBjorn Beishline2025-11-251-3/+10
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* Remove some forgotten commented out codeMarc2025-05-021-2/+0
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* Removed instance from uart typesMarc2025-05-021-146/+160
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* BufferedUart initializationMichael Gomez2025-04-041-2/+2
| | | | | | | This change modifies UART initialization throughout Embassy to take pins before interrupts. Related to #1304.
* Remove Peripheral trait, rename PeripheralRef->Peri.Dario Nieuwenhuis2025-03-271-39/+27
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* Add split_ref fn to uart, allowing a mutable reference split into RX & TX ↵Mathias2024-07-171-2/+14
| | | | handles. Also change order of RX and TX handles in split fn, to streamline with other HALs
* rustfmtrafael2024-07-101-2/+2
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* implement read_ready method in BufferedUartrafael2024-07-101-0/+18
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* fix(embassy-rp): fix drop implementation of BufferedUartRx and BufferedUartTxtact1m4n32024-05-171-68/+78
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* Merge branch 'embassy-rs:main' into barafael/minor_clippy_lints_rpRafael Bachmann2024-03-251-8/+2
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| * Fix warnings in recent nightly.Dario Nieuwenhuis2024-03-201-8/+2
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* | fix minor clippy lints in embassy_rpRafael Bachmann2024-03-181-2/+2
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* docs: document all embassy-rp public apisUlf Lilleengen2023-12-191-0/+1
| | | | Enable missing doc warnings.
* docs: embassy-rp rustdoc and refactoringUlf Lilleengen2023-12-191-0/+20
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* Remove nightly and unstable-traits features in preparation for 1.75.Dario Nieuwenhuis2023-11-291-87/+78
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* time: Update examples, tests, and other code to use new Timer::after_x ↵Adam Greig2023-10-151-2/+2
| | | | convenience methods
* Remove a few ultra-verbose logs.Dario Nieuwenhuis2023-10-031-2/+0
| | | | | | They're heavily spamming logs for HIL tests, and I don't believe they're valuable now that the thing they helped debug in their young age is now solid and mature.
* Update embedded-hal to 1.0.0-rc.1 (#1783)Dario Nieuwenhuis2023-08-161-23/+3
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* Update to embedded-io 0.5 (#1752)Dario Nieuwenhuis2023-08-071-13/+13
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* Rename embassy-hal-common to embassy-hal-internal, document it's for ↵Dario Nieuwenhuis2023-07-281-1/+1
| | | | internal use only. (#1700)
* rp: update rp-pac.Dario Nieuwenhuis2023-06-161-144/+125
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* Make interrupt module more standard.Dario Nieuwenhuis2023-06-081-3/+3
| | | | | | | | | | | | - Move typelevel interrupts to a special-purpose mod: `embassy_xx::interrupt::typelevel`. - Reexport the PAC interrupt enum in `embassy_xx::interrupt`. This has a few advantages: - The `embassy_xx::interrupt` module is now more "standard". - It works with `cortex-m` functions for manipulating interrupts, for example. - It works with RTIC. - the interrupt enum allows holding value that can be "any interrupt at runtime", this can't be done with typelevel irqs. - When "const-generics on enums" is stable, we can remove the typelevel interrupts without disruptive changes to `embassy_xx::interrupt`.
* cortex-m: remove owned interrupts.Dario Nieuwenhuis2023-06-011-7/+7
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* rp: remove take!, add bind_interrupts!pennae2023-05-151-100/+109
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* Fix some typosDirk Stolle2023-05-081-1/+1
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* rp/uart: report errors from dma receivepennae2023-05-011-1/+1
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* rp/uart: report errors from buffered uartpennae2023-05-011-14/+72
| | | | | | | | | this reports errors at the same location the blocking uart would, which works out to being mostly exact (except in the case of overruns, where one extra character is dropped). this is actually easier than going nuclear in the case of errors and nuking both the buffer contents and the rx fifo, both of which are things we'd have to do in addition to what's added here, and neither are needed for correctness.
* rp/uart: extract common code from async and blocking buffered readspennae2023-05-011-47/+39
| | | | | once we add error propagation the common code will become even larger, so it makes sense to move it out.
* rp/uart: rename state to buffered_statepennae2023-05-011-12/+12
| | | | we'll add a dma state soon as well.
* rp/uart: add set-break functionspennae2023-05-011-0/+47
| | | | | | | sending break conditions is necessary to implement some protocols, and the hardware supports this natively. we do have to make sure that we don't assert a break condition while the uart is busy though, otherwise the break may be inserted before the last character in the tx fifo.
* Remove the _todo_embedded_hal_serial impls. EH will probably not have these ↵Dario Nieuwenhuis2023-04-151-55/+0
| | | | serial traits.
* rp: Allow zero len writes for buffered uartTimo Kröger2023-04-021-0/+8
| | | | Prevents the write methods from getting stuck forever.
* rp: Allow zero len reads for buffered uartTimo Kröger2023-04-011-0/+8
| | | | Prevents the read methods from getting stuck forever.
* Fix return type for EH-nb traitsMathias2023-03-231-4/+4
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* Add embedded-io blocking Read + Write for BufferedUartMathias2023-03-231-10/+56
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* Allow upgrading a blocking uart to a BufferedUart, and implement blocking ↵Mathias2023-03-141-49/+291
| | | | serial traits for BufferedUart
* rp: Fix formatting string to please CITimo Kröger2023-01-051-1/+1
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* rp: Improve BufferedUart interrupt handlingTimo Kröger2023-01-051-21/+58
| | | | | | * Only clear interrupt flags that have fired (so that we do not lose any error flags) * Enable RX interrupt when a read is requested, disable it when the RX buffer is full * Rework TX interrupt handling: its "edge" triggered by a FIFO threshold
* rp: Disable RX interrupts when ring buffer is fullTimo Kröger2023-01-041-52/+35
| | | | | | | | When data is in the RX fifo the RX timeout interrupt goes high again even after clearing it. The result is a deadlock because execution is stuck in the interrupt handler. No other code can run to clear the receive buffer. Enable and disable RX interrupts based on the buffer fill level. Use the same approach for the TX code path.
* rp: Fix BufferedUart drop codeTimo Kröger2023-01-041-25/+26
| | | | Only unregister the interrupt handler when both parts are inactive
* rp: Common init function for BufferedUartTimo Kröger2023-01-041-122/+64
| | | | BufferedUart, BufferedUartRx and BufferedUartTX can all use the same init code.
* rp: Fill and empty FIFOs in buffered uart interruptTimo Kröger2022-12-271-10/+28
| | | | | Fixes an issue where only the first byte was transmitted. Should improve throughput aswell.
* embassy-rp: Add split() to BufferedUartkalkyl2022-12-221-0/+7
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* rp/uart: use lockfree ringbuffer.Dario Nieuwenhuis2022-11-251-314/+342
| | | | This gets rid of another PeripheralMutex usage.
* Switch to async-fn-in-traitDario Nieuwenhuis2022-11-251-43/+17
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* Update Rust nightly.Dario Nieuwenhuis2022-10-261-8/+8
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* Fix bufferedUart read and write testsMathias2022-09-271-48/+40
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* Rename from {Rx,Tx}BufferedUart to BufferedUart{Rx,Tx} to be compliant with ↵Mathias2022-09-271-13/+13
| | | | stm32 and nrf implementations
* Add HIL test for bufferedUartMathias2022-09-261-2/+1
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* Remove code-duplication in async bufferedUart implementationsMathias2022-09-211-126/+89
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