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path: root/embassy-rp/src/uart/mod.rs
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* Update to embedded-io 0.7Dario Nieuwenhuis2025-12-191-0/+8
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* Remove atomic-polyfillBjorn Beishline2025-11-251-5/+23
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* embassy-rp: doc comment spelling passRob Wells2025-10-271-1/+1
| | | | | All changes but one are to documentation comments, and one to an ordinary comment.
* Rustfmt for edition 2024.Dario Nieuwenhuis2025-10-061-12/+4
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* remove line break reference from documentationMatt Bhagat-Conway2025-07-031-16/+16
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* fix rustfmt in read_to_break docstringMatt Bhagat-Conway2025-07-031-1/+1
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* add note about UART line breaks being different from ASCIIMatt Bhagat-Conway2025-07-031-0/+6
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* Replace generic inner with argumentsMarc2025-05-021-14/+19
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* Removed instance from uart typesMarc2025-05-021-127/+164
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* embassy-rp: uart: Increase RX FIFO watermarkDavid Brown2025-04-071-1/+1
| | | | | | | | | | | | | | | | | | | | Change the UART RX FIFO depth from 1/8 to 7/8. This should allow for buffered receipt of uart data with a lower IRQ load. The PL011 fifo is pretty smart about the fifo, it has an automatic timeout (which triggers an interrupt) of about 4 characters worth of time, so setting this threshold doesn't affect the behavior of receipt of a partially filled fifo. This should not have any affect on the DMA mode, as the DMA will generally drain the fifo as data becomes available. The constraint for the fifo threshold should be determined by expected interrupt latency. The IRQ needs to be able to drain the fifo before it fills. As such, the proper threshold depends on system design and data rate. At full speed (7.8 Mbaud), the remaining 8 characters will come in in about 10us, which is probably insufficient. But, the time is quite adequate at lower speeds.
* Remove Peripheral trait, rename PeripheralRef->Peri.Dario Nieuwenhuis2025-03-271-97/+71
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* fix(rp): use uart dreq number defined in pacibuki20032024-11-141-6/+16
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* Also implement `embedded_io::Write` for `UartTx<'d, T: Instance, Blocking>`flippette2024-11-011-0/+14
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* Implement `embedded_io::Write` for `Uart<'d, T: Instance, Blocking>` (#3483)flippette2024-10-311-0/+14
| | | | | | | | | * Implement `embedded_io::{Read,Write}` for `Uart<'d, T: Instance, Blocking>` * Unimplement `embedded_io::Read` for `Uart<'d, T: Instance, Blocking>` * Revert "Unimplement `embedded_io::Read` for `Uart<'d, T: Instance, Blocking>`" * Unimplement `embedded_io::Read` for `Uart<'d, T: Instance, Blocking>` (take 2)
* rp: add constructor for tx-only blocking UARTSebastian Quilitz2024-09-161-0/+11
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* Fix CI, rename private feature, address comments from dirbaio.Caleb Jamison2024-08-121-18/+18
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* Handle pad isolation everywhere and in the same way.Caleb Jamison2024-08-101-4/+20
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* Initial rp235x supportCaleb Jamison2024-08-081-6/+116
| | | | Examples have been run, but there is not yet a test suite.
* Add read_to_break_with_countJomer.Dev2024-07-191-100/+155
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* Correctly handle modifying LCR register after uart enableMathias2024-07-171-22/+51
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* Add split_ref fn to uart, allowing a mutable reference split into RX & TX ↵Mathias2024-07-171-1/+27
| | | | handles. Also change order of RX and TX handles in split fn, to streamline with other HALs
* fix(embassy-rp): fix drop implementation of BufferedUartRx and BufferedUartTxtact1m4n32024-05-171-4/+4
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* rp: remove mod sealed.Dario Nieuwenhuis2024-04-051-31/+24
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* fix minor clippy lints in embassy_rpRafael Bachmann2024-03-181-1/+1
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* Use saturating_sub to make sure we don't overflowJomer.Dev2024-01-291-2/+2
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* A rebase ate my doc comment!James Munns2024-01-191-0/+4
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* Fun Learning about the RP2040 UART impl!James Munns2024-01-191-40/+41
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* Debugging RSRJames Munns2024-01-191-48/+80
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* A little more cleanupJames Munns2024-01-191-1/+4
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* Update with more docs and less panicsJames Munns2024-01-191-23/+95
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* Add a basic "read to break" functionJames Munns2024-01-191-0/+88
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* docs: document all embassy-rp public apisUlf Lilleengen2023-12-191-1/+2
| | | | Enable missing doc warnings.
* docs: document spi, rtc and rest of uart for embassy-rpUlf Lilleengen2023-12-191-2/+46
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* docs: embassy-rp rustdoc and refactoringUlf Lilleengen2023-12-191-0/+4
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* Fix nb on rp uartJames Munns2023-12-181-3/+5
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* Remove nightly and unstable-traits features in preparation for 1.75.Dario Nieuwenhuis2023-11-291-130/+114
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* time: Update examples, tests, and other code to use new Timer::after_x ↵Adam Greig2023-10-151-2/+2
| | | | convenience methods
* Update embedded-hal to 1.0.0-rc.1 (#1783)Dario Nieuwenhuis2023-08-161-29/+9
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* rp: rename gpio::Pin::io to gpio::Pin::gpiopennae2023-07-311-4/+4
| | | | | | we'll need access to the pin io bank registers for an upcoming fix, and having both `io` and `io_bank` or similar can get confusing quickly. rename `io` to `gpio` to avoid this, and also match the type while there.
* Rename embassy-hal-common to embassy-hal-internal, document it's for ↵Dario Nieuwenhuis2023-07-281-1/+1
| | | | internal use only. (#1700)
* rp: update rp-pac.Dario Nieuwenhuis2023-06-161-165/+142
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* Make interrupt module more standard.Dario Nieuwenhuis2023-06-081-5/+5
| | | | | | | | | | | | - Move typelevel interrupts to a special-purpose mod: `embassy_xx::interrupt::typelevel`. - Reexport the PAC interrupt enum in `embassy_xx::interrupt`. This has a few advantages: - The `embassy_xx::interrupt` module is now more "standard". - It works with `cortex-m` functions for manipulating interrupts, for example. - It works with RTIC. - the interrupt enum allows holding value that can be "any interrupt at runtime", this can't be done with typelevel irqs. - When "const-generics on enums" is stable, we can remove the typelevel interrupts without disruptive changes to `embassy_xx::interrupt`.
* cortex-m: remove owned interrupts.Dario Nieuwenhuis2023-06-011-8/+6
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* Fix return definitionAlpha3__02023-05-251-2/+2
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* Implement eh 0.2.* serial::Write for Uart/UartTxAlpha3__02023-05-251-0/+38
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* rp: remove take!, add bind_interrupts!pennae2023-05-151-41/+60
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* Fix some typosDirk Stolle2023-05-081-2/+2
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* rp: remove leftovers from #1414pennae2023-05-021-5/+3
| | | | forgot to remove these when they were no longer necessary or useful. oops.
* rp/uart: report errors from dma receivepennae2023-05-011-13/+138
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* rp/uart: extract fifo draining from blocking_readpennae2023-05-011-23/+27
| | | | this will also be needed for dma operations.
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