| Commit message (Collapse) | Author | Age | Files | Lines | ||
|---|---|---|---|---|---|---|
| ... | ||||||
| * | cortex-m: remove owned interrupts. | Dario Nieuwenhuis | 2023-06-01 | 2 | -15/+13 | |
| | | ||||||
| * | Fix return definition | Alpha3__0 | 2023-05-25 | 1 | -2/+2 | |
| | | ||||||
| * | Implement eh 0.2.* serial::Write for Uart/UartTx | Alpha3__0 | 2023-05-25 | 1 | -0/+38 | |
| | | ||||||
| * | rp: remove take!, add bind_interrupts! | pennae | 2023-05-15 | 2 | -141/+169 | |
| | | ||||||
| * | Fix some typos | Dirk Stolle | 2023-05-08 | 2 | -3/+3 | |
| | | ||||||
| * | rp: remove leftovers from #1414 | pennae | 2023-05-02 | 1 | -5/+3 | |
| | | | | | forgot to remove these when they were no longer necessary or useful. oops. | |||||
| * | rp/uart: report errors from dma receive | pennae | 2023-05-01 | 2 | -14/+139 | |
| | | ||||||
| * | rp/uart: extract fifo draining from blocking_read | pennae | 2023-05-01 | 1 | -23/+27 | |
| | | | | | this will also be needed for dma operations. | |||||
| * | rp/uart: make dma multicore-safe | pennae | 2023-05-01 | 1 | -2/+2 | |
| | | | | | | running rx and tx on different cores could lead to hangs if the dmacr register modifys run concurrently. this is bad. | |||||
| * | rp/uart: report errors from buffered uart | pennae | 2023-05-01 | 1 | -14/+72 | |
| | | | | | | | | | | this reports errors at the same location the blocking uart would, which works out to being mostly exact (except in the case of overruns, where one extra character is dropped). this is actually easier than going nuclear in the case of errors and nuking both the buffer contents and the rx fifo, both of which are things we'd have to do in addition to what's added here, and neither are needed for correctness. | |||||
| * | rp/uart: extract common code from async and blocking buffered reads | pennae | 2023-05-01 | 1 | -47/+39 | |
| | | | | | | once we add error propagation the common code will become even larger, so it makes sense to move it out. | |||||
| * | rp/uart: rename state to buffered_state | pennae | 2023-05-01 | 2 | -14/+14 | |
| | | | | | we'll add a dma state soon as well. | |||||
| * | rp/uart: add set-break functions | pennae | 2023-05-01 | 2 | -1/+95 | |
| | | | | | | | | sending break conditions is necessary to implement some protocols, and the hardware supports this natively. we do have to make sure that we don't assert a break condition while the uart is busy though, otherwise the break may be inserted before the last character in the tx fifo. | |||||
| * | rp/uart: add UartRx::new_blocking | pennae | 2023-05-01 | 1 | -0/+10 | |
| | | ||||||
| * | Merge #1378 | bors[bot] | 2023-04-18 | 1 | -6/+47 | |
| |\ | | | | | | | | | | | | | | | | | | | 1378: Add ability to invert UART pins, take 2 r=Dirbaio a=jakewins Same PR as before, except this now works :) There was a minor hiccup in the UartRx code where the rx pin got passed as the tx argument, so the invert settings didn't get applied. With this fix, my local setup at least is happily reading inverted uart data. Co-authored-by: Jacob Davis-Hansson <[email protected]> | |||||
| | * | Pass rx pin to right init arg | Jacob Davis-Hansson | 2023-04-18 | 1 | -7/+23 | |
| | | | ||||||
| | * | outover instead of inover | Jacob Davis-Hansson | 2023-04-15 | 1 | -3/+3 | |
| | | | ||||||
| | * | Add ability to invert UART pins | Jacob Davis-Hansson | 2023-04-14 | 1 | -4/+29 | |
| | | | | | | | | | | | | | This is useful in some cases where the surrounding circuit for some reason inverts the UART signal, for instance if you're talking to a device via an optocoupler. | |||||
| * | | Remove the _todo_embedded_hal_serial impls. EH will probably not have these ↵ | Dario Nieuwenhuis | 2023-04-15 | 2 | -110/+0 | |
| |/ | | | | serial traits. | |||||
| * | Merge #1318 | bors[bot] | 2023-04-02 | 1 | -0/+16 | |
| |\ | | | | | | | | | | | | | | | | | | | 1318: rp: Allow zero len reads for buffered uart r=Dirbaio a=timokroeger Prevents the read methods from getting stuck forever. cc `@MathiasKoch` can you test if this fixes the problem you described in the chat? Co-authored-by: Timo Kröger <[email protected]> | |||||
| | * | rp: Allow zero len writes for buffered uart | Timo Kröger | 2023-04-02 | 1 | -0/+8 | |
| | | | | | | | | | Prevents the write methods from getting stuck forever. | |||||
| | * | rp: Allow zero len reads for buffered uart | Timo Kröger | 2023-04-01 | 1 | -0/+8 | |
| | | | | | | | | | Prevents the read methods from getting stuck forever. | |||||
| * | | Fix set_baudrate on RP-PICO | Thierry Fleury | 2023-04-01 | 1 | -4/+4 | |
| |/ | ||||||
| * | Fix return type for EH-nb traits | Mathias | 2023-03-23 | 1 | -4/+4 | |
| | | ||||||
| * | Add embedded-io blocking Read + Write for BufferedUart | Mathias | 2023-03-23 | 1 | -10/+56 | |
| | | ||||||
| * | Add HIL test for into_buffered uart on embassy-rp | Mathias | 2023-03-14 | 1 | -2/+1 | |
| | | ||||||
| * | Allow upgrading a blocking uart to a BufferedUart, and implement blocking ↵ | Mathias | 2023-03-14 | 2 | -50/+340 | |
| | | | | | serial traits for BufferedUart | |||||
| * | RP-PICO UART adding set_baudrate: missing to run rust-fmt | Andres Hurtado Lopez | 2023-02-26 | 1 | -14/+10 | |
| | | ||||||
| * | RP-PICO UART adding set_baudrate: Changing static call from specific type to ↵ | Andres Hurtado Lopez | 2023-02-26 | 1 | -2/+2 | |
| | | | | | a Self (requires adding lifetime specifier) | |||||
| * | RP-PICO UART adding set_baudrate: refactoring of methods | Andres Hurtado Lopez | 2023-02-26 | 1 | -28/+23 | |
| | | ||||||
| * | RP-PICO UART adding set_baudrate | Andres Hurtado Lopez | 2023-02-26 | 1 | -14/+36 | |
| | | ||||||
| * | Merge #1142 | bors[bot] | 2023-01-14 | 1 | -188/+151 | |
| |\ | | | | | | | | | | | | | | | | | | | 1142: More rp2040 BufferedUart fixes r=Dirbaio a=timokroeger * Refactor init code * Make it possible to drop RX without breaking TX (or vice versa) * Correctly handle RX buffer full scenario Co-authored-by: Timo Kröger <[email protected]> | |||||
| | * | rp: Fix formatting string to please CI | Timo Kröger | 2023-01-05 | 1 | -1/+1 | |
| | | | ||||||
| | * | rp: Improve BufferedUart interrupt handling | Timo Kröger | 2023-01-05 | 1 | -21/+58 | |
| | | | | | | | | | | | | | * Only clear interrupt flags that have fired (so that we do not lose any error flags) * Enable RX interrupt when a read is requested, disable it when the RX buffer is full * Rework TX interrupt handling: its "edge" triggered by a FIFO threshold | |||||
| | * | rp: Disable RX interrupts when ring buffer is full | Timo Kröger | 2023-01-04 | 1 | -52/+35 | |
| | | | | | | | | | | | | | | | | | When data is in the RX fifo the RX timeout interrupt goes high again even after clearing it. The result is a deadlock because execution is stuck in the interrupt handler. No other code can run to clear the receive buffer. Enable and disable RX interrupts based on the buffer fill level. Use the same approach for the TX code path. | |||||
| | * | rp: Fix BufferedUart drop code | Timo Kröger | 2023-01-04 | 1 | -25/+26 | |
| | | | | | | | | | Only unregister the interrupt handler when both parts are inactive | |||||
| | * | rp: Common init function for BufferedUart | Timo Kröger | 2023-01-04 | 1 | -122/+64 | |
| | | | | | | | | | BufferedUart, BufferedUartRx and BufferedUartTX can all use the same init code. | |||||
| * | | rp2040: add {tx,rx}-only constructors to UART | Pedro Ferreira | 2023-01-04 | 1 | -4/+28 | |
| |/ | ||||||
| * | rp: Fill and empty FIFOs in buffered uart interrupt | Timo Kröger | 2022-12-27 | 1 | -10/+28 | |
| | | | | | | Fixes an issue where only the first byte was transmitted. Should improve throughput aswell. | |||||
| * | embassy-rp: Add split() to BufferedUart | kalkyl | 2022-12-22 | 1 | -0/+7 | |
| | | ||||||
| * | rp/uart: use lockfree ringbuffer. | Dario Nieuwenhuis | 2022-11-25 | 2 | -352/+395 | |
| | | | | | This gets rid of another PeripheralMutex usage. | |||||
| * | Switch to async-fn-in-trait | Dario Nieuwenhuis | 2022-11-25 | 1 | -43/+17 | |
| | | ||||||
| * | Update Rust nightly. | Dario Nieuwenhuis | 2022-10-26 | 1 | -8/+8 | |
| | | ||||||
| * | Update embedded-hal versions and explicitly pin | Ulf Lilleengen | 2022-09-29 | 1 | -6/+6 | |
| | | ||||||
| * | Add preliminary I2C implementation for RP2040 | Mathias | 2022-09-27 | 1 | -0/+5 | |
| | | ||||||
| * | Fix bufferedUart read and write tests | Mathias | 2022-09-27 | 2 | -49/+46 | |
| | | ||||||
| * | Rename from {Rx,Tx}BufferedUart to BufferedUart{Rx,Tx} to be compliant with ↵ | Mathias | 2022-09-27 | 1 | -13/+13 | |
| | | | | | stm32 and nrf implementations | |||||
| * | Add HIL test for bufferedUart | Mathias | 2022-09-26 | 1 | -2/+1 | |
| | | ||||||
| * | Remove code-duplication in async bufferedUart implementations | Mathias | 2022-09-21 | 1 | -126/+89 | |
| | | ||||||
| * | Formatting | Mathias | 2022-09-09 | 1 | -3/+1 | |
| | | ||||||
 |
index : embassy | |
| Unnamed repository; edit this file 'description' to name the repository. |
| aboutsummaryrefslogtreecommitdiff |