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path: root/embassy-stm32/src/timer/mod.rs
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* low-power: improve debug logicxoviat2025-12-061-2/+2
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* stm32: use typelevel timer typexoviat2025-11-271-12/+18
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* timer: add writable ring bufferxoviat2025-11-251-0/+1
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* stm32/stop: move stop_with_rtc into initxoviat2025-11-041-2/+2
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* stm32/afio: use type inference for timer remaps as well.Dario Nieuwenhuis2025-09-051-36/+7
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* Add STM32F1 AFIO remapFabian Wolter2025-09-051-1/+30
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* stm32: rename timer channel trait; replace impls via macro with impls ↵melvdl2025-06-271-24/+24
| | | | generic over timer channels
* stm32: generify timer channelsmelvdl2025-06-261-25/+86
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* Merge pull request #4044 from yodaldevoid/stm32-opm-timerDario Nieuwenhuis2025-04-061-0/+10
|\ | | | | STM32: One pulse mode timer
| * stm32/timer: Support one pulse modeGabriel Smith2025-04-041-0/+1
| | | | | | | | | | Currently does not support output pins so it really is only useful to create delayed interrupts based on external signals.
| * stm32/timer: Merge channel typestate structsGabriel Smith2025-04-041-0/+9
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* | Remove Peripheral trait, rename PeripheralRef->Peri.Dario Nieuwenhuis2025-03-271-2/+2
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* Use inline const for initializing arrays. (#3567)Dario Nieuwenhuis2024-11-241-3/+2
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* Make clone_unchecked workGrant Miller2024-09-211-1/+1
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* wip: split by valueGrant Miller2024-09-071-0/+1
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* pwm_input is working on F446Bruno Bousquet2024-05-291-0/+1
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* fix fmt for ciBruno Bousquet2024-05-061-0/+1
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* add async captureBruno Bousquet2024-05-061-1/+92
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* format timer/mod.rsBruno Bousquet2024-05-051-1/+1
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* create input_captureBruno Bousquet2024-05-051-0/+1
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* add missing interrupt for timereZio Pan2024-04-051-39/+66
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* "separate CC interrupt" is for AdvCh4 onlyeZio Pan2024-04-051-19/+20
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* move `enable_outputs` to private trait ...eZio Pan2024-04-051-6/+37
| | | | ... to avoid API leaking.
* stm32/timer: simplify traits, convert from trait methods to struct.Dario Nieuwenhuis2024-03-231-883/+122
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* stm32: Fix psc compile error with current stm32-dataRené van Dorst2024-03-201-4/+4
| | | | | Commit https://github.com/embassy-rs/stm32-data/commit/cc525f1b252c91272529cbea1d3d4399b43c60b4 has changed the definition of the `psc` register. Update timer/mod.rs to reflect the stm32-data change.
* STM32 SimplePwm: Fix regression and re-enable output pinRalf2024-03-081-6/+31
| | | | | | | | PR #2499 implemented timer hierarchy, but removed enable_outputs() from trait CaptureCompare16bitInstance and from SimplePwm. This functions is required for advanced timers to set bit BDTR.MOE and to enable the output signal.
* update metapaceZio Pan2024-02-291-6/+6
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* stm32: timers: use TIMx_CC interrupt source for advanced timersTorin Cooper-Bennun2024-02-261-4/+15
| | | | fixes (hopefully) time driver when using TIM1/8/20
* hal-internal: remove impl DerefMut for PeripheralRef.Dario Nieuwenhuis2024-02-201-32/+32
| | | | | | | | | if you have `PeripheralRef<'a, AnyPIn>` for pin A, and `AnyPin` (owned) for pin B, you can `mem::swap` them. so, getting access forever to pin A, just by "sacrificing" pin B this defeats the point of PeripheralRef, which is if you got a `PeripheralRef<'a, T>` then you're only allowed to use the peripheral for `'a`. Also some drivers rely on the fact only one instance of a singleton exists for soundness, so this is a soundness fix for those.
* timer-doc-fixeZio Pan2024-02-101-8/+14
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* use cfg_if to reduce macro conditioneZio Pan2024-02-101-20/+14
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* doc fixeZio Pan2024-02-101-8/+11
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* restore original public API of timer, but keep new PACeZio Pan2024-02-101-288/+233
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* bug fixeZio Pan2024-02-101-3/+3
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* stm32-timer: filter out c0, f1 and f37xeZio Pan2024-02-101-3/+3
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* stm32-timer: L0 is specialeZio Pan2024-02-101-0/+20
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* add methods with macroeZio Pan2024-02-101-262/+226
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* update timer mod after stm32-metapac timer_v2eZio Pan2024-02-091-111/+403
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* refactor with clippyeZio Pan2024-01-061-9/+6
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* impl waveform with TIM ChanneleZio Pan2024-01-061-0/+25
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* stm32/timer: add missing supertrait bounds.Dario Nieuwenhuis2024-01-021-4/+7
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* record&restore TIM OC to it's earlier stateeZio Pan2023-12-291-0/+10
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* implement PWM waveform generating with DMAeZio Pan2023-12-281-1/+17
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* stm32/timer: docs.Dario Nieuwenhuis2023-12-191-24/+134
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* stm32: more docs.Dario Nieuwenhuis2023-12-181-0/+3
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* after stm32-metapac update, TIM CR1 ARPE enum to booleZio Pan2023-12-141-1/+1
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* stm32/timer: Fix frequency off-by-oneGrant Miller2023-12-011-1/+4
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* Merge branch 'master' into center-alignDion Dokter2023-10-201-3/+39
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| * STM32: timer enable_output does not take bool, but just enables the outputRalf2023-10-131-4/+4
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| * STM32: Fix regression in advanced timer to enable output of PWM signal by ↵Ralf2023-10-131-3/+11
| | | | | | | | partly reverting commit 74eb519
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