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* | stm32: autogenerate mux config for all chips.Dario Nieuwenhuis2024-03-014-49/+52
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* stm32/adc: reexport enums from PAC to avoid boilerplate hell.Dario Nieuwenhuis2024-02-261-1/+1
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* FDCAN: Don't require internal module for public API.Corey Schuhen2024-02-251-2/+2
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* Remove the OperatingMode typestatesCorey Schuhen2024-02-181-4/+5
| | | | | | Instead have two explcit types(without the mode generic arg)types: - One for config - One for all operating modes
* Add a buffered mode.Corey Schuhen2024-02-171-7/+90
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* Port FDCAN HAL to use PAC directly instead of fdcan crate.Corey Schuhen2024-02-171-14/+82
| | | | | | - Provide separate FDCAN capable and Classic CAN API's - Don't use fdcan crate dep anymore - Provide embedded-can traits.
* RefinementsBarnaby Walters2024-02-171-0/+1
| | | | | | | | | | * Implemented boost mode dance (RM0440 p234-245, 6.5.1) * Enabled boost mode in usb_serial example, tested on hardware * Removed hard requirement of a valid 48MHz source (HSI48 is checked if requested, PLL passed through as-is and assumed to be valid) * Used calc_pclk to calculate APB frequencies * Refactored 48MHz configuration code to remove unnecessary let and block * Renamed ahb_freq to hclk for clarity and consistency
* Removed redundant HSI48 configurationBarnaby Walters2024-02-161-3/+4
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* [embassy-stm32]: started stm32g4 RCC refactorBarnaby Walters2024-02-153-27/+34
| | | | | | | | * Copied API from f.rs where applicable * HSE and HSI independantly configurable * Boost mode set by user rather * Added HSE, pll1_q and pll1_p frequencies to set_clocks call * Stubbed max module based on f.rs, needs cleanup
* Add FDCAN examples for STM32G4, STM32H5 and STM32H7Corey Schuhen2024-01-311-0/+56
| | | | | | | | Fix examples Fix examples Fix examples.
* stm32/gpio: remove generics.Dario Nieuwenhuis2024-01-221-3/+2
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* Change GPIO inherent methods back to `&self`.Dario Nieuwenhuis2024-01-101-1/+1
| | | | | | | With the embedded-hal rc3 update I changed them to require `&mut self`, but in retrospect I think `&self` is better, for extra flexibility. This PR reverts the changes from the rc3 update to inherent methods.
* ci: use beta, add secondary nightly ci.Dario Nieuwenhuis2023-12-217-7/+0
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* Update embedded-hal to 1.0.0-rc.3Dario Nieuwenhuis2023-12-141-1/+1
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* stm32/rcc: consistent casing and naming for PLL enums.Dario Nieuwenhuis2023-11-133-8/+8
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* usb: remove msos-descriptor feature.Dario Nieuwenhuis2023-11-081-0/+1
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* stm32/rcc: add shared code for hsi48 with crs support.Dario Nieuwenhuis2023-11-051-4/+2
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* stm32: rename HSI16 -> HSIDario Nieuwenhuis2023-10-222-2/+2
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* Merge branch 'master' into center-alignDion Dokter2023-10-205-23/+23
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| * stm32: expand rcc mux to g4 and h7xoviat2023-10-141-1/+1
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| * time: Update examples, tests, and other code to use new Timer::after_x ↵Adam Greig2023-10-154-12/+12
| | | | | | | | convenience methods
| * stm32/rcc: use more PLL etc enums from PAC.Dario Nieuwenhuis2023-10-111-1/+1
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| * stm32/rcc: use PLL enums from PAC.Dario Nieuwenhuis2023-10-093-10/+10
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* | Fix examplesDion Dokter2023-10-011-1/+1
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* initial support for STM32G4 ADCDaehyeok Mun2023-09-041-0/+41
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* stm32/pwm: add output type controlxoviat2023-07-291-1/+2
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* stm32/timer: merge pwm module into timer. (#1703)Dario Nieuwenhuis2023-07-281-2/+2
| | | | The traits there are applicable to timer use cases other than PWM. It doesn't make sense to keep them separated.
* STM32G4: Add CRS support to RCCKevin Lannen2023-06-281-9/+19
| | | | Create working CRS USB Example
* stm32: update metapac, includes fix for OTG with 9 endpoints (H7)Dario Nieuwenhuis2023-06-271-1/+3
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* stm32: update stm32-metapac.Dario Nieuwenhuis2023-06-191-3/+1
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* STM32G4: Add USB Serial exampleKevin Lannen2023-06-141-0/+110
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* stm32g4: PLL: Add support for configuring PLL_P and PLL_QKevin Lannen2023-06-141-3/+12
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* Rename to follow ref manual and CubeIDECarl St-Laurent2023-06-081-2/+2
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* Added Vcore boost mode and Flash wait stateCarl St-Laurent2023-06-041-2/+2
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* Use HSI16 for exemple since HSE might have a different value depending on boardCarl St-Laurent2023-06-041-3/+2
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* Example using PLLCarl St-Laurent2023-06-031-0/+27
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* stm32: fix defective examplexoviat2023-04-161-2/+2
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* Split embassy-time from embassy-executor.Dario Nieuwenhuis2022-08-183-5/+5
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* Remove HAL initialization from #[embassy::main] macro.Dario Nieuwenhuis2022-08-173-6/+6
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* Split embassy crate into embassy-executor, embassy-util.Dario Nieuwenhuis2022-07-293-8/+8
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* rename PwmPin::new_chX, update examples.Dario Nieuwenhuis2022-07-231-2/+3
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* embassy-stm32: Simplify timeGrant Miller2022-07-101-2/+2
| | | | | | | | | | - Remove unused `MilliSeconds`, `MicroSeconds`, and `NanoSeconds` types - Remove `Bps`, `KiloHertz`, and `MegaHertz` types that were only used for converting to `Hertz` - Replace all instances of `impl Into<Hertz>` with `Hertz` - Add `hz`, `khz`, and `mhz` methods to `Hertz`, as well as free function shortcuts - Remove `U32Ext` extension trait
* Run rustfmt.Dario Nieuwenhuis2022-06-124-9/+6
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* Use embassy/defmt-timestamp-uptime in all examples.Dario Nieuwenhuis2022-04-025-29/+12
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* stm32: Remove OptionalPinDario Nieuwenhuis2022-02-101-2/+1
| | | | | | | | | The idea behind OptionalPin has a few problems: - you need to impl the signal traits for NoPin which is a bit weird https://github.com/embassy-rs/embassy/blob/master/embassy-stm32/src/dcmi.rs#L413-L416 - you can pass any combination of set/unset pins, which needs checking at runtime https://github.com/embassy-rs/embassy/blob/master/embassy-stm32/src/dcmi.rs#L130 The replacement is to do multiple `new` constructors for each combination of pins you want to take.
* stm32/exti: expose all functionality as inherent methods.Dario Nieuwenhuis2022-01-191-1/+0
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* stm32/gpio: expose all functionality as inherent methods.Dario Nieuwenhuis2022-01-192-5/+3
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* Port the PWM example to H7, add low-level API example implementing 32-bit PWM.Matous Hybl2022-01-131-2/+2
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* examples/stm32g4: add pwm exampleDario Nieuwenhuis2021-11-271-0/+36
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* stm32: add stm32g4 support.Dario Nieuwenhuis2021-11-274-0/+102
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