aboutsummaryrefslogtreecommitdiff
path: root/examples
Commit message (Collapse)AuthorAgeFilesLines
* added TL Mailbox initialization for STM32WBgoueslati2023-05-021-0/+44
|
* Merge #1376bors[bot]2023-05-012-0/+31
|\ | | | | | | | | | | | | | | 1376: rtc: cleanup and consolidate r=Dirbaio a=xoviat This removes an extra file that I left in, adds an example, and consolidates the files into one 'v2' file. Co-authored-by: xoviat <[email protected]>
| * stm32/rtc: cleanup and consolidatexoviat2023-04-182-0/+31
| |
* | Merge #1414bors[bot]2023-05-011-1/+8
|\ \ | | | | | | | | | | | | | | | | | | | | | 1414: rp: report errors from buffered and dma uart receives r=Dirbaio a=pennae neither of these reported errors so far, which is not ideal. add error reporting to both of them that matches the blocking error reporting as closely as is feasible, even allowing partial receives from buffered uarts before errors are reported where they would have been by the blocking code. dma transfers don't do this, if an errors applies to any byte in a transfer the entire transfer is nuked (though we probably could report how many bytes have been transferred). Co-authored-by: pennae <[email protected]>
| * | rp/uart: report errors from dma receivepennae2023-05-011-1/+8
| | |
* | | rp/pio: write instr memory only from commonpennae2023-05-013-15/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | instruction memory is a shared resource. writing it only from PioCommon clarifies this, and perhaps makes it more obvious that multiple state machines can share the same instructions. this also allows *freeing* of instruction memory to reprogram the system, although this interface is not entirely safe yet. it's safe in the sense rusts understands things, but state machines may misbehave if their instruction memory is freed and rewritten while they are running. fixing this is out of scope for now since it requires some larger changes to how state machines are handled. the interface provided currently is already unsafe in that it lets people execute instruction memory that has never been written, so this isn't much of a drawback for now.
* | | rp/pio: move non-sm-specific methods to PioCommonpennae2023-05-012-12/+19
|/ / | | | | | | | | | | | | | | | | | | pin and irq operations affect the entire pio block. with pins this is not very problematic since pins themselves are resources, but irqs are not treated like that and can thus interfere across state machines. the ability to wait for an irq on a state machine is kept to make synchronization with user code easier, and since we can't inspect loaded programs at build time we wouldn't gain much from disallowing waits from state machines anyway.
* | Merge branch 'embassy-rs:master' into masterChuck Davis2023-04-2833-33/+33
|\ \
| * | Bump versions preparing for -macros and -executor releaseUlf Lilleengen2023-04-2733-33/+33
| | |
* | | Remove external-lora-phy feature.ceekdee2023-04-284-4/+4
| | |
* | | Remove legacy LoRa drivers.ceekdee2023-04-272-2/+2
|/ /
* | rp: remove pio Cargo feature.Dario Nieuwenhuis2023-04-261-1/+1
| | | | | | | | We shouldn't have Cargo features if their only purpose is reduce cold build time a bit.
* | build fixes for stableUlf Lilleengen2023-04-262-2/+2
| |
* | Merge branch 'embassy-rs:master' into masterChuck Davis2023-04-2633-60/+60
|\ \
| * | fix stm32f7 example runner command for probe-rs-cliMalte Brieske2023-04-261-1/+1
| | |
| * | Switch from probe-run to probe-rs-cli.Dario Nieuwenhuis2023-04-2633-60/+60
| | | | | | | | | | | | | | | - probe-run screwed up the last release 2 weeks ago and it's still not fixed (issue 391). Doesn't look well maintained. - Even when it's not broken, it lags behind probe-rs-cli in new chips support because it's slow in updating probe-rs.
* | | Add nightly feature specification for lora-phy.ceekdee2023-04-262-4/+4
| | |
* | | Correct nightly feature specification.ceekdee2023-04-262-3/+4
| | |
* | | Deprecate original LoRa drivers. Update rust-lorawan releases.ceekdee2023-04-255-127/+8
| | |
* | | Add lora-phy examples.ceekdee2023-04-2319-316/+1215
| | |
* | | Merge branch 'embassy-rs:master' into masterChuck Davis2023-04-231-0/+27
|\| |
| * | Merge #1387bors[bot]2023-04-231-0/+27
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1387: rp: add PWM api r=Dirbaio a=pennae add PWM api ~~including interrupts and async support.~~ depends on https://github.com/embassy-rs/rp-pac/pull/1 **TODO**: - [x] example - [x] test - [x] move divmode to typelevel - [x] deduplicate `new_*` functions Co-authored-by: pennae <[email protected]>
| | * | rp: add PWM apipennae2023-04-231-0/+27
| | | |
* | | | Use released lora-phy.ceekdee2023-04-214-4/+4
| | | |
* | | | Add external LoRa physical layer functionality.ceekdee2023-04-2110-98/+549
|/ / /
* / / embassy-boot: update ci and examples to use the nightly flagsander2023-04-209-10/+10
|/ /
* | Merge #1379bors[bot]2023-04-1831-32/+32
|\ \ | | | | | | | | | | | | | | | | | | | | | 1379: enable inline-asm feature for cortex-m in examples r=Dirbaio a=pennae inline assembly is supported since rust 1.59, we're way past that. enabling this makes the compiled code more compact, and on rp2040 even decreses memory usage by not needing thunks in sram. Co-authored-by: pennae <[email protected]>
| * | enable inline-asm feature for cortex-m in examplespennae2023-04-1831-32/+32
| |/ | | | | | | | | | | inline assembly is supported since rust 1.59, we're way past that. enabling this makes the compiled code more compact, and on rp2040 even decreses memory usage by not needing thunks in sram.
* / stm32/spi: add new_txonly_nosck constructor, for neopixels, with an example ↵anton smeenk2023-04-181-0/+101
|/ | | | in the stm32g0 directory.
* stm32/sdmmc: add init_card retry.Dario Nieuwenhuis2023-04-171-1/+12
|
* Merge #1369bors[bot]2023-04-175-8/+8
|\ | | | | | | | | | | | | | | | | | | 1369: Lora AFIT r=Dirbaio a=Dirbaio Extracted out of #1367 Probably we should wait until `rust-lorawan` is merged+released? Co-authored-by: Ulf Lilleengen <[email protected]>
| * update to released versionsUlf Lilleengen2023-04-173-6/+6
| |
| * Update to rust-lorawan with afit supportUlf Lilleengen2023-04-155-8/+8
| |
| |
| \
*-. \ Merge #1371 #1374bors[bot]2023-04-172-3/+3
|\ \ \ | |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1371: RTC r=Dirbaio a=xoviat This adds RTC for most of the stm32 chips. Nearly all of the work was not done by me, but I took it the last bit by disabling the chips that weren't working. I think it would be easier to enable them in future PRs if requested. 1374: stm32: remove TIMX singleton when used on timer driver r=Dirbaio a=xoviat After multiple ways of looking at this, this is the best solution I could think of. Co-authored-by: Mathias <[email protected]> Co-authored-by: xoviat <[email protected]>
| | * stm32: fix defective examplexoviat2023-04-161-2/+2
| |/ |/|
| * stm32/rtc: remove chrono datetime and add convertersxoviat2023-04-161-1/+1
|/
* stm32/sdmmc: switch to AFIT.Dario Nieuwenhuis2023-04-151-1/+1
|
* Release embassy-sync v0.2.0Dario Nieuwenhuis2023-04-1333-33/+33
|
* Fix duplicate package nameSebastian Goll2023-04-111-1/+1
|
* stm32: remove subghz feature.Dario Nieuwenhuis2023-04-071-1/+1
| | | | It's available only on WL. if you're using a WL, you want subghz for sure.
* Merge #1330bors[bot]2023-04-061-0/+77
|\ | | | | | | | | | | | | | | 1330: stm32/pwm: add complementary pwm r=Dirbaio a=xoviat This implements complementary PWM with dead time on many supported targets. The specific dead-time programming functions are passed through directly to the user, which is a bit ugly but the best compromise I could reach for now. Co-authored-by: xoviat <[email protected]>
| * stm32/pwm: fix unused importxoviat2023-04-051-1/+1
| |
| * stm32/pwm: add complementary pwm examplexoviat2023-04-051-0/+77
| |
* | Update embedded-hal crates.Dario Nieuwenhuis2023-04-067-133/+46
| |
* | Merge #1333bors[bot]2023-04-061-0/+35
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | 1333: STM32: Adc V1 r=Dirbaio a=GrantM11235 Based on #947 Co-authored-by: Matthew W. Samsonoff <[email protected]> Co-authored-by: Grant Miller <[email protected]>
| * | Fix example reference voltageGrant Miller2023-04-051-4/+3
| | |
| * | Fix exampleGrant Miller2023-04-051-3/+12
| | |
| * | Update STM32F0 ADC example to use `read_internal`Matthew W. Samsonoff2023-04-051-2/+5
| | |
| * | Add ADC example for STM32F0Matthew W. Samsonoff2023-04-051-0/+24
| | |
* | | stm32: add H5 support.Dario Nieuwenhuis2023-04-0613-0/+615
|/ /
generated by cgit (git 2.34.1) at 2026-04-06 05:56:26 +0000