aboutsummaryrefslogtreecommitdiff
path: root/stm32-data
Commit message (Collapse)AuthorAgeFilesLines
...
* Make UART pins Rx/Tx/etc in addition to USART.Bob McWhirter2021-07-011-0/+0
|
* Add USARTv3 support.Bob McWhirter2021-07-011-0/+0
|
* stm32: Adjust some fences around DMAThales Fragoso2021-06-301-0/+0
| | | | Also bump stm32-data
* Generate dma-related macro tables.Bob McWhirter2021-06-291-0/+0
|
* Add F0 RCCThales Fragoso2021-06-241-0/+0
|
* Update stm32-data (adds DBGMCU to all chips)Dario Nieuwenhuis2021-06-211-0/+0
|
* Update submoduleUlf Lilleengen2021-06-161-0/+0
|
* Rename from wl55 to wl5x and enable debug wfeUlf Lilleengen2021-06-161-0/+0
|
* Add support for generating PAC for dual coresUlf Lilleengen2021-06-161-0/+0
| | | | | | | | * Chips that have multiple cores will be exposed as chipname_corename, i.e. stm32wl55jc_cm4 * Chips that have single cores will use the chip family as feature name and pick the first and only core from the list * Add support for stm32wl55 chip family
* ADCv3 and example.Bob McWhirter2021-06-141-0/+0
|
* Initial support and example for STM32WB55Dominik Boehi2021-06-121-0/+0
|
* Update reference to missing H7ABUlf Lilleengen2021-06-101-0/+0
|
* Update stm32-data to fix rcc_h7ab issues.Dario Nieuwenhuis2021-06-101-0/+0
|
* Bring over DAC example (relies upon stm32-data update)Bob McWhirter2021-06-081-0/+0
|
* Update submodule refUlf Lilleengen2021-06-081-0/+0
|
* Update submodule refUlf Lilleengen2021-06-071-0/+0
|
* FixUlf Lilleengen2021-06-071-0/+0
|
* Update refUlf Lilleengen2021-06-071-0/+0
|
* Update to new apiUlf Lilleengen2021-06-071-0/+0
|
* Create the new peripheral_pins! macro table.Bob McWhirter2021-06-031-0/+0
|
* DAC v2 basics.Bob McWhirter2021-06-011-0/+0
|
* More fixesDario Nieuwenhuis2021-05-311-0/+0
|
* Add stm32-metapac crate, with codegen in rustDario Nieuwenhuis2021-05-311-0/+0