From ed64d99a510dab0d2a8c9a1b6bf362a95e5ffd35 Mon Sep 17 00:00:00 2001 From: Gerzain Mata Date: Mon, 14 Jul 2025 16:49:50 -0700 Subject: WIP for USB_OTG support on STM32WBA devices --- embassy-stm32/Cargo.toml | 4 ++-- embassy-stm32/src/usb/mod.rs | 28 ++++++++++++++++++++++++++-- embassy-stm32/src/usb/otg.rs | 21 ++++++++++++++++++--- 3 files changed, 46 insertions(+), 7 deletions(-) diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index c086fbbcf..c28636dc8 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -81,7 +81,7 @@ futures-util = { version = "0.3.30", default-features = false } sdio-host = "0.9.0" critical-section = "1.1" #stm32-metapac = { version = "16" } -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-019a3ce0ea3b5bd832ec2ad53465a0d80b0f4e0a" } +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-60582dd866b34e690f156cd72b91300a9a8057c0" } vcell = "0.1.3" nb = "1.0.0" @@ -110,7 +110,7 @@ proc-macro2 = "1.0.36" quote = "1.0.15" #stm32-metapac = { version = "16", default-features = false, features = ["metadata"]} -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-019a3ce0ea3b5bd832ec2ad53465a0d80b0f4e0a", default-features = false, features = ["metadata"] } +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-60582dd866b34e690f156cd72b91300a9a8057c0", default-features = false, features = ["metadata"] } [features] default = ["rt"] diff --git a/embassy-stm32/src/usb/mod.rs b/embassy-stm32/src/usb/mod.rs index ae5963420..692897b59 100644 --- a/embassy-stm32/src/usb/mod.rs +++ b/embassy-stm32/src/usb/mod.rs @@ -15,7 +15,7 @@ fn common_init() { let freq = T::frequency(); // On the H7RS, the USBPHYC embeds a PLL accepting one of the input frequencies listed below and providing 48MHz to OTG_FS and 60MHz to OTG_HS internally - #[cfg(any(stm32h7rs, all(stm32u5, peri_usb_otg_hs)))] + #[cfg(any(stm32h7rs, all(stm32u5, peri_usb_otg_hs), all(stm32wba, peri_usb_otg_hs)))] if ![16_000_000, 19_200_000, 20_000_000, 24_000_000, 26_000_000, 32_000_000].contains(&freq.0) { panic!( "USB clock should be one of 16, 19.2, 20, 24, 26, 32Mhz but is {} Hz. Please double-check your RCC settings.", @@ -25,7 +25,7 @@ fn common_init() { // Check frequency is within the 0.25% tolerance allowed by the spec. // Clock might not be exact 48Mhz due to rounding errors in PLL calculation, or if the user // has tight clock restrictions due to something else (like audio). - #[cfg(not(any(stm32h7rs, all(stm32u5, peri_usb_otg_hs))))] + #[cfg(not(any(stm32h7rs, all(stm32u5, peri_usb_otg_hs), all(stm32wba, peri_usb_otg_hs))))] if freq.0.abs_diff(48_000_000) > 120_000 { panic!( "USB clock should be 48Mhz but is {} Hz. Please double-check your RCC settings.", @@ -102,6 +102,30 @@ fn common_init() { } } + #[cfg(stm32wba)] + { + // Enable USB power + critical_section::with(|_| { + crate::pac::PWR.svmcr().modify(|w| { + w.set_usv(crate::pac::pwr::vals::Usv::B_0X1); + // w.set_uvmen(true); + }) + }); + + // Wait for USB power to stabilize + while !crate::pac::PWR.vosr().read().vdd11usbrdy() {} + + // Now set up transceiver power if it's a OTG-HS + #[cfg(peri_usb_otg_hs)] + { + crate::pac::PWR.vosr().modify(|w| { + w.set_usbpwren(true); + w.set_usbboosten(true); + }); + while !crate::pac::PWR.vosr().read().usbboostrdy() {} + } + } + T::Interrupt::unpend(); unsafe { T::Interrupt::enable() }; diff --git a/embassy-stm32/src/usb/otg.rs b/embassy-stm32/src/usb/otg.rs index 590d1a427..d664709d3 100644 --- a/embassy-stm32/src/usb/otg.rs +++ b/embassy-stm32/src/usb/otg.rs @@ -105,7 +105,7 @@ impl<'d, T: Instance> Driver<'d, T> { config: Config, ) -> Self { // For STM32U5 High speed pins need to be left in analog mode - #[cfg(not(all(stm32u5, peri_usb_otg_hs)))] + #[cfg(not(any(all(stm32u5, peri_usb_otg_hs),all(stm32wba, peri_usb_otg_hs))))] { _dp.set_as_af(_dp.af_num(), AfType::output(OutputType::PushPull, Speed::VeryHigh)); _dm.set_as_af(_dm.af_num(), AfType::output(OutputType::PushPull, Speed::VeryHigh)); @@ -323,6 +323,20 @@ impl<'d, T: Instance> Bus<'d, T> { }); } + #[cfg(all(stm32wba, peri_usb_otg_hs))] + { + crate::pac::SYSCFG.otghsphycr().modify(|w| { + w.set_en(true); + }); + + critical_section::with(|_| { + crate::pac::RCC.ahb2enr().modify(|w| { + w.set_otgen(true); + w.set_otghsphyen(true); + }); + }); + } + let r = T::regs(); let core_id = r.cid().read().0; trace!("Core id {:08x}", core_id); @@ -464,6 +478,7 @@ foreach_interrupt!( stm32f7, stm32l4, stm32u5, + stm32wba, ))] { const FIFO_DEPTH_WORDS: u16 = 320; const ENDPOINT_COUNT: usize = 6; @@ -473,7 +488,7 @@ foreach_interrupt!( } else if #[cfg(any(stm32h7, stm32h7rs))] { const FIFO_DEPTH_WORDS: u16 = 1024; const ENDPOINT_COUNT: usize = 9; - } else if #[cfg(stm32u5)] { + } else if #[cfg(any(stm32wba, stm32u5))] { const FIFO_DEPTH_WORDS: u16 = 320; const ENDPOINT_COUNT: usize = 6; } else { @@ -523,7 +538,7 @@ foreach_interrupt!( ))] { const FIFO_DEPTH_WORDS: u16 = 1024; const ENDPOINT_COUNT: usize = 9; - } else if #[cfg(stm32u5)] { + } else if #[cfg(any(stm32wba, stm32u5))] { const FIFO_DEPTH_WORDS: u16 = 1024; const ENDPOINT_COUNT: usize = 9; } else { -- cgit From d3308f7e5a02da5fb6ccdd6059afe8656761a685 Mon Sep 17 00:00:00 2001 From: Gerzain Mata Date: Wed, 16 Jul 2025 17:32:34 -0700 Subject: Fixed register names from recent stm32-data changes --- embassy-stm32/src/usb/otg.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-stm32/src/usb/otg.rs b/embassy-stm32/src/usb/otg.rs index a8b625e8c..5602a2541 100644 --- a/embassy-stm32/src/usb/otg.rs +++ b/embassy-stm32/src/usb/otg.rs @@ -335,7 +335,7 @@ impl<'d, T: Instance> Bus<'d, T> { critical_section::with(|_| { crate::pac::RCC.ahb2enr().modify(|w| { - w.set_otgen(true); + w.set_usb_otg_hsen(true); w.set_otghsphyen(true); }); }); -- cgit From f46bfd4c6ff50740b7177c054918da6a393ca7f1 Mon Sep 17 00:00:00 2001 From: Gerzain Mata Date: Wed, 16 Jul 2025 17:47:48 -0700 Subject: Cargo fmt recent changes --- embassy-stm32/src/usb/otg.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-stm32/src/usb/otg.rs b/embassy-stm32/src/usb/otg.rs index 5602a2541..b074cfa1b 100644 --- a/embassy-stm32/src/usb/otg.rs +++ b/embassy-stm32/src/usb/otg.rs @@ -105,7 +105,7 @@ impl<'d, T: Instance> Driver<'d, T> { config: Config, ) -> Self { // For STM32U5 High speed pins need to be left in analog mode - #[cfg(not(any(all(stm32u5, peri_usb_otg_hs),all(stm32wba, peri_usb_otg_hs))))] + #[cfg(not(any(all(stm32u5, peri_usb_otg_hs), all(stm32wba, peri_usb_otg_hs))))] { _dp.set_as_af(_dp.af_num(), AfType::output(OutputType::PushPull, Speed::VeryHigh)); _dm.set_as_af(_dm.af_num(), AfType::output(OutputType::PushPull, Speed::VeryHigh)); -- cgit