From 1c860d4a6e283e24a4609ff8b1ca2cc3cbf2f428 Mon Sep 17 00:00:00 2001 From: Bernát Süli Date: Fri, 19 Dec 2025 04:15:57 +0100 Subject: stm32: disable HSI48 if not in use --- embassy-stm32/src/rcc/c0.rs | 6 ++++++ embassy-stm32/src/rcc/f013.rs | 6 ++++++ embassy-stm32/src/rcc/g0.rs | 6 ++++++ embassy-stm32/src/rcc/g4.rs | 6 ++++++ embassy-stm32/src/rcc/h.rs | 6 ++++++ embassy-stm32/src/rcc/hsi48.rs | 21 +++++++++++++++++++++ embassy-stm32/src/rcc/l.rs | 6 ++++++ embassy-stm32/src/rcc/u5.rs | 6 ++++++ 8 files changed, 63 insertions(+) diff --git a/embassy-stm32/src/rcc/c0.rs b/embassy-stm32/src/rcc/c0.rs index 99f22273d..7801078c3 100644 --- a/embassy-stm32/src/rcc/c0.rs +++ b/embassy-stm32/src/rcc/c0.rs @@ -185,6 +185,12 @@ pub(crate) unsafe fn init(config: Config) { RCC.cr().modify(|w| w.set_hsion(false)); } + // Disable the HSI48, if not used + #[cfg(crs)] + if config.hsi48.is_none() { + super::disable_hsi48(); + } + config.mux.init(); set_clocks!( diff --git a/embassy-stm32/src/rcc/f013.rs b/embassy-stm32/src/rcc/f013.rs index 1155b6acd..92cf9fca7 100644 --- a/embassy-stm32/src/rcc/f013.rs +++ b/embassy-stm32/src/rcc/f013.rs @@ -480,6 +480,12 @@ pub(crate) unsafe fn init(config: Config) { }; */ + // Disable the HSI48, if not used + #[cfg(crs)] + if config.hsi48.is_none() { + super::disable_hsi48(); + } + config.mux.init(); set_clocks!( diff --git a/embassy-stm32/src/rcc/g0.rs b/embassy-stm32/src/rcc/g0.rs index ce6398afd..2665c20f9 100644 --- a/embassy-stm32/src/rcc/g0.rs +++ b/embassy-stm32/src/rcc/g0.rs @@ -294,6 +294,12 @@ pub(crate) unsafe fn init(config: Config) { RCC.cr().modify(|w| w.set_hsion(false)); } + // Disable the HSI48, if not used + #[cfg(crs)] + if config.hsi48.is_none() { + super::disable_hsi48(); + } + if config.low_power_run { assert!(sys <= Hertz(2_000_000)); PWR.cr1().modify(|w| w.set_lpr(true)); diff --git a/embassy-stm32/src/rcc/g4.rs b/embassy-stm32/src/rcc/g4.rs index da13e16aa..0dd3713c8 100644 --- a/embassy-stm32/src/rcc/g4.rs +++ b/embassy-stm32/src/rcc/g4.rs @@ -300,6 +300,12 @@ pub(crate) unsafe fn init(config: Config) { RCC.cr().modify(|w| w.set_hsion(false)); } + // Disable the HSI48, if not used + #[cfg(crs)] + if config.hsi48.is_none() { + super::disable_hsi48(); + } + if config.low_power_run { assert!(sys <= Hertz(2_000_000)); PWR.cr1().modify(|w| w.set_lpr(true)); diff --git a/embassy-stm32/src/rcc/h.rs b/embassy-stm32/src/rcc/h.rs index 485edd390..2fe2a435c 100644 --- a/embassy-stm32/src/rcc/h.rs +++ b/embassy-stm32/src/rcc/h.rs @@ -671,6 +671,12 @@ pub(crate) unsafe fn init(config: Config) { RCC.cr().modify(|w| w.set_hsion(false)); } + // Disable the HSI48, if not used + #[cfg(crs)] + if config.hsi48.is_none() { + super::disable_hsi48(); + } + // IO compensation cell - Requires CSI clock and SYSCFG #[cfg(any(stm32h7))] // TODO h5, h7rs if csi.is_some() { diff --git a/embassy-stm32/src/rcc/hsi48.rs b/embassy-stm32/src/rcc/hsi48.rs index 49be4af5e..4eb701ea2 100644 --- a/embassy-stm32/src/rcc/hsi48.rs +++ b/embassy-stm32/src/rcc/hsi48.rs @@ -66,3 +66,24 @@ pub(crate) fn init_hsi48(config: Hsi48Config) -> Hertz { HSI48_FREQ } + +pub(crate) fn disable_hsi48() { + // disable CRS if it is enabled + rcc::disable::(); + + // Disable HSI48 + #[cfg(not(any(stm32u5, stm32g0, stm32h5, stm32h7, stm32h7rs, stm32u5, stm32wba, stm32f0, stm32c071)))] + let r = RCC.crrcr(); + #[cfg(any(stm32u5, stm32g0, stm32h5, stm32h7, stm32h7rs, stm32u5, stm32wba, stm32c071))] + let r = RCC.cr(); + #[cfg(any(stm32f0))] + let r = RCC.cr2(); + + r.modify(|w| w.set_hsi48on(false)); + + // Disable VREFINT reference for HSI48 oscillator + #[cfg(stm32l0)] + crate::pac::SYSCFG.cfgr3().modify(|w| { + w.set_enref_hsi48(false); + }); +} \ No newline at end of file diff --git a/embassy-stm32/src/rcc/l.rs b/embassy-stm32/src/rcc/l.rs index a1dfefd15..55f383374 100644 --- a/embassy-stm32/src/rcc/l.rs +++ b/embassy-stm32/src/rcc/l.rs @@ -390,6 +390,12 @@ pub(crate) unsafe fn init(config: Config) { RCC.cr().modify(|w| w.set_hsion(false)); } + // Disable the HSI48, if not used + #[cfg(crs)] + if config.hsi48.is_none() { + super::disable_hsi48(); + } + config.mux.init(); set_clocks!( diff --git a/embassy-stm32/src/rcc/u5.rs b/embassy-stm32/src/rcc/u5.rs index c8c3e4adb..9f37107a3 100644 --- a/embassy-stm32/src/rcc/u5.rs +++ b/embassy-stm32/src/rcc/u5.rs @@ -472,6 +472,12 @@ pub(crate) unsafe fn init(config: Config) { RCC.cr().modify(|w| w.set_hsion(false)); } + // Disable the HSI48, if not used + #[cfg(crs)] + if config.hsi48.is_none() { + super::disable_hsi48(); + } + config.mux.init(); set_clocks!( -- cgit From 44f183e5e29c45baa726ba52d85377168a2b62c4 Mon Sep 17 00:00:00 2001 From: Bernát Süli Date: Fri, 19 Dec 2025 04:22:33 +0100 Subject: rustfmt --- embassy-stm32/src/rcc/hsi48.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/rcc/hsi48.rs b/embassy-stm32/src/rcc/hsi48.rs index 4eb701ea2..50ac162a4 100644 --- a/embassy-stm32/src/rcc/hsi48.rs +++ b/embassy-stm32/src/rcc/hsi48.rs @@ -80,10 +80,10 @@ pub(crate) fn disable_hsi48() { let r = RCC.cr2(); r.modify(|w| w.set_hsi48on(false)); - + // Disable VREFINT reference for HSI48 oscillator #[cfg(stm32l0)] crate::pac::SYSCFG.cfgr3().modify(|w| { w.set_enref_hsi48(false); }); -} \ No newline at end of file +} -- cgit