From 7b7ac1bd3ea2eb4897b8fcab706da968188bb700 Mon Sep 17 00:00:00 2001 From: Daniel Trnka Date: Sun, 22 Dec 2024 12:53:05 +0100 Subject: stm32/usart: disabling receiver before write in half-duplex moved to a new function --- embassy-stm32/src/usart/mod.rs | 27 +++++++++++++-------------- 1 file changed, 13 insertions(+), 14 deletions(-) diff --git a/embassy-stm32/src/usart/mod.rs b/embassy-stm32/src/usart/mod.rs index 98b5c9cfe..48cc4f6d6 100644 --- a/embassy-stm32/src/usart/mod.rs +++ b/embassy-stm32/src/usart/mod.rs @@ -437,13 +437,7 @@ impl<'d> UartTx<'d, Async> { pub async fn write(&mut self, buffer: &[u8]) -> Result<(), Error> { let r = self.info.regs; - // Enable Transmitter and disable Receiver for Half-Duplex mode - let mut cr1 = r.cr1().read(); - if r.cr3().read().hdsel() && !cr1.te() { - cr1.set_te(true); - cr1.set_re(self.duplex == Duplex::Half(HalfDuplexReadback::Readback)); - r.cr1().write_value(cr1); - } + half_duplex_set_rx_tx_before_write(&r, self.duplex == Duplex::Half(HalfDuplexReadback::Readback)); let ch = self.tx_dma.as_mut().unwrap(); r.cr3().modify(|reg| { @@ -544,13 +538,7 @@ impl<'d, M: Mode> UartTx<'d, M> { pub fn blocking_write(&mut self, buffer: &[u8]) -> Result<(), Error> { let r = self.info.regs; - // Enable Transmitter and disable Receiver for Half-Duplex mode - let mut cr1 = r.cr1().read(); - if r.cr3().read().hdsel() && !cr1.te() { - cr1.set_te(true); - cr1.set_re(self.duplex == Duplex::Half(HalfDuplexReadback::Readback)); - r.cr1().write_value(cr1); - } + half_duplex_set_rx_tx_before_write(&r, self.duplex == Duplex::Half(HalfDuplexReadback::Readback)); for &b in buffer { while !sr(r).read().txe() {} @@ -629,6 +617,17 @@ pub fn send_break(regs: &Regs) { regs.rqr().write(|w| w.set_sbkrq(true)); } +/// Enable Transmitter and disable Receiver for Half-Duplex mode +/// In case of readback, keep Receiver enabled +fn half_duplex_set_rx_tx_before_write(r: &Regs, enable_readback: bool) { + let mut cr1 = r.cr1().read(); + if r.cr3().read().hdsel() && !cr1.te() { + cr1.set_te(true); + cr1.set_re(enable_readback); + r.cr1().write_value(cr1); + } +} + impl<'d> UartRx<'d, Async> { /// Create a new rx-only UART with no hardware flow control. /// -- cgit