From 7e501855fc2ee98bef6be56244c4587610dbdc32 Mon Sep 17 00:00:00 2001 From: xoviat Date: Sat, 27 May 2023 15:05:07 -0500 Subject: stm32/ipcc: move into tl_mbox --- embassy-stm32/src/ipcc.rs | 174 -------------------------------------- embassy-stm32/src/lib.rs | 2 - embassy-stm32/src/tl_mbox/ipcc.rs | 174 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 174 insertions(+), 176 deletions(-) delete mode 100644 embassy-stm32/src/ipcc.rs create mode 100644 embassy-stm32/src/tl_mbox/ipcc.rs diff --git a/embassy-stm32/src/ipcc.rs b/embassy-stm32/src/ipcc.rs deleted file mode 100644 index ea33b32c7..000000000 --- a/embassy-stm32/src/ipcc.rs +++ /dev/null @@ -1,174 +0,0 @@ -use crate::ipcc::sealed::Instance; -use crate::peripherals::IPCC; -use crate::rcc::sealed::RccPeripheral; - -#[non_exhaustive] -#[derive(Clone, Copy, Default)] -pub struct Config { - // TODO: add IPCC peripheral configuration, if any, here - // reserved for future use -} - -#[derive(Debug, Clone, Copy)] -#[repr(C)] -pub enum IpccChannel { - Channel1 = 0, - Channel2 = 1, - Channel3 = 2, - Channel4 = 3, - Channel5 = 4, - Channel6 = 5, -} - -pub(crate) mod sealed { - pub trait Instance: crate::rcc::RccPeripheral { - fn regs() -> crate::pac::ipcc::Ipcc; - fn set_cpu2(enabled: bool); - } -} - -pub(crate) struct Ipcc; - -impl Ipcc { - pub(crate) fn init(_config: Config) { - IPCC::enable(); - IPCC::reset(); - IPCC::set_cpu2(true); - - unsafe { _configure_pwr() }; - - let regs = IPCC::regs(); - - unsafe { - regs.cpu(0).cr().modify(|w| { - w.set_rxoie(true); - w.set_txfie(true); - }) - } - } - - pub(crate) fn c1_set_rx_channel(channel: IpccChannel, enabled: bool) { - let regs = IPCC::regs(); - - // If bit is set to 1 then interrupt is disabled - unsafe { regs.cpu(0).mr().modify(|w| w.set_chom(channel as usize, !enabled)) } - } - - pub(crate) fn c1_get_rx_channel(channel: IpccChannel) -> bool { - let regs = IPCC::regs(); - - // If bit is set to 1 then interrupt is disabled - unsafe { !regs.cpu(0).mr().read().chom(channel as usize) } - } - - #[allow(dead_code)] - pub(crate) fn c2_set_rx_channel(channel: IpccChannel, enabled: bool) { - let regs = IPCC::regs(); - - // If bit is set to 1 then interrupt is disabled - unsafe { regs.cpu(1).mr().modify(|w| w.set_chom(channel as usize, !enabled)) } - } - - #[allow(dead_code)] - pub(crate) fn c2_get_rx_channel(channel: IpccChannel) -> bool { - let regs = IPCC::regs(); - - // If bit is set to 1 then interrupt is disabled - unsafe { !regs.cpu(1).mr().read().chom(channel as usize) } - } - - pub(crate) fn c1_set_tx_channel(channel: IpccChannel, enabled: bool) { - let regs = IPCC::regs(); - - // If bit is set to 1 then interrupt is disabled - unsafe { regs.cpu(0).mr().modify(|w| w.set_chfm(channel as usize, !enabled)) } - } - - pub(crate) fn c1_get_tx_channel(channel: IpccChannel) -> bool { - let regs = IPCC::regs(); - - // If bit is set to 1 then interrupt is disabled - unsafe { !regs.cpu(0).mr().read().chfm(channel as usize) } - } - - #[allow(dead_code)] - pub(crate) fn c2_set_tx_channel(channel: IpccChannel, enabled: bool) { - let regs = IPCC::regs(); - - // If bit is set to 1 then interrupt is disabled - unsafe { regs.cpu(1).mr().modify(|w| w.set_chfm(channel as usize, !enabled)) } - } - - #[allow(dead_code)] - pub(crate) fn c2_get_tx_channel(channel: IpccChannel) -> bool { - let regs = IPCC::regs(); - - // If bit is set to 1 then interrupt is disabled - unsafe { !regs.cpu(1).mr().read().chfm(channel as usize) } - } - - /// clears IPCC receive channel status for CPU1 - pub(crate) fn c1_clear_flag_channel(channel: IpccChannel) { - let regs = IPCC::regs(); - - unsafe { regs.cpu(0).scr().write(|w| w.set_chc(channel as usize, true)) } - } - - #[allow(dead_code)] - /// clears IPCC receive channel status for CPU2 - pub(crate) fn c2_clear_flag_channel(channel: IpccChannel) { - let regs = IPCC::regs(); - - unsafe { regs.cpu(1).scr().write(|w| w.set_chc(channel as usize, true)) } - } - - pub(crate) fn c1_set_flag_channel(channel: IpccChannel) { - let regs = IPCC::regs(); - - unsafe { regs.cpu(0).scr().write(|w| w.set_chs(channel as usize, true)) } - } - - #[allow(dead_code)] - pub(crate) fn c2_set_flag_channel(channel: IpccChannel) { - let regs = IPCC::regs(); - - unsafe { regs.cpu(1).scr().write(|w| w.set_chs(channel as usize, true)) } - } - - pub(crate) fn c1_is_active_flag(channel: IpccChannel) -> bool { - let regs = IPCC::regs(); - - unsafe { regs.cpu(0).sr().read().chf(channel as usize) } - } - - pub(crate) fn c2_is_active_flag(channel: IpccChannel) -> bool { - let regs = IPCC::regs(); - - unsafe { regs.cpu(1).sr().read().chf(channel as usize) } - } - - pub(crate) fn is_tx_pending(channel: IpccChannel) -> bool { - !Self::c1_is_active_flag(channel) && Self::c1_get_tx_channel(channel) - } - - pub(crate) fn is_rx_pending(channel: IpccChannel) -> bool { - Self::c2_is_active_flag(channel) && Self::c1_get_rx_channel(channel) - } -} - -impl sealed::Instance for crate::peripherals::IPCC { - fn regs() -> crate::pac::ipcc::Ipcc { - crate::pac::IPCC - } - - fn set_cpu2(enabled: bool) { - unsafe { crate::pac::PWR.cr4().modify(|w| w.set_c2boot(enabled)) } - } -} - -unsafe fn _configure_pwr() { - let rcc = crate::pac::RCC; - - // set RF wake-up clock = LSE - rcc.csr().modify(|w| w.set_rfwkpsel(0b01)); -} diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs index c9df5c1b2..b9d7a15c7 100644 --- a/embassy-stm32/src/lib.rs +++ b/embassy-stm32/src/lib.rs @@ -41,8 +41,6 @@ pub mod crc; pub mod flash; #[cfg(all(spi_v1, rcc_f4))] pub mod i2s; -#[cfg(stm32wb)] -pub mod ipcc; pub mod pwm; #[cfg(quadspi)] pub mod qspi; diff --git a/embassy-stm32/src/tl_mbox/ipcc.rs b/embassy-stm32/src/tl_mbox/ipcc.rs new file mode 100644 index 000000000..d1ac731ed --- /dev/null +++ b/embassy-stm32/src/tl_mbox/ipcc.rs @@ -0,0 +1,174 @@ +use self::sealed::Instance; +use crate::peripherals::IPCC; +use crate::rcc::sealed::RccPeripheral; + +#[non_exhaustive] +#[derive(Clone, Copy, Default)] +pub struct Config { + // TODO: add IPCC peripheral configuration, if any, here + // reserved for future use +} + +#[derive(Debug, Clone, Copy)] +#[repr(C)] +pub enum IpccChannel { + Channel1 = 0, + Channel2 = 1, + Channel3 = 2, + Channel4 = 3, + Channel5 = 4, + Channel6 = 5, +} + +pub mod sealed { + pub trait Instance: crate::rcc::RccPeripheral { + fn regs() -> crate::pac::ipcc::Ipcc; + fn set_cpu2(enabled: bool); + } +} + +pub struct Ipcc; + +impl Ipcc { + pub fn enable(_config: Config) { + IPCC::enable(); + IPCC::reset(); + IPCC::set_cpu2(true); + + unsafe { _configure_pwr() }; + + let regs = IPCC::regs(); + + unsafe { + regs.cpu(0).cr().modify(|w| { + w.set_rxoie(true); + w.set_txfie(true); + }) + } + } + + pub fn c1_set_rx_channel(channel: IpccChannel, enabled: bool) { + let regs = IPCC::regs(); + + // If bit is set to 1 then interrupt is disabled + unsafe { regs.cpu(0).mr().modify(|w| w.set_chom(channel as usize, !enabled)) } + } + + pub fn c1_get_rx_channel(channel: IpccChannel) -> bool { + let regs = IPCC::regs(); + + // If bit is set to 1 then interrupt is disabled + unsafe { !regs.cpu(0).mr().read().chom(channel as usize) } + } + + #[allow(dead_code)] + pub fn c2_set_rx_channel(channel: IpccChannel, enabled: bool) { + let regs = IPCC::regs(); + + // If bit is set to 1 then interrupt is disabled + unsafe { regs.cpu(1).mr().modify(|w| w.set_chom(channel as usize, !enabled)) } + } + + #[allow(dead_code)] + pub fn c2_get_rx_channel(channel: IpccChannel) -> bool { + let regs = IPCC::regs(); + + // If bit is set to 1 then interrupt is disabled + unsafe { !regs.cpu(1).mr().read().chom(channel as usize) } + } + + pub fn c1_set_tx_channel(channel: IpccChannel, enabled: bool) { + let regs = IPCC::regs(); + + // If bit is set to 1 then interrupt is disabled + unsafe { regs.cpu(0).mr().modify(|w| w.set_chfm(channel as usize, !enabled)) } + } + + pub fn c1_get_tx_channel(channel: IpccChannel) -> bool { + let regs = IPCC::regs(); + + // If bit is set to 1 then interrupt is disabled + unsafe { !regs.cpu(0).mr().read().chfm(channel as usize) } + } + + #[allow(dead_code)] + pub fn c2_set_tx_channel(channel: IpccChannel, enabled: bool) { + let regs = IPCC::regs(); + + // If bit is set to 1 then interrupt is disabled + unsafe { regs.cpu(1).mr().modify(|w| w.set_chfm(channel as usize, !enabled)) } + } + + #[allow(dead_code)] + pub fn c2_get_tx_channel(channel: IpccChannel) -> bool { + let regs = IPCC::regs(); + + // If bit is set to 1 then interrupt is disabled + unsafe { !regs.cpu(1).mr().read().chfm(channel as usize) } + } + + /// clears IPCC receive channel status for CPU1 + pub fn c1_clear_flag_channel(channel: IpccChannel) { + let regs = IPCC::regs(); + + unsafe { regs.cpu(0).scr().write(|w| w.set_chc(channel as usize, true)) } + } + + #[allow(dead_code)] + /// clears IPCC receive channel status for CPU2 + pub fn c2_clear_flag_channel(channel: IpccChannel) { + let regs = IPCC::regs(); + + unsafe { regs.cpu(1).scr().write(|w| w.set_chc(channel as usize, true)) } + } + + pub fn c1_set_flag_channel(channel: IpccChannel) { + let regs = IPCC::regs(); + + unsafe { regs.cpu(0).scr().write(|w| w.set_chs(channel as usize, true)) } + } + + #[allow(dead_code)] + pub fn c2_set_flag_channel(channel: IpccChannel) { + let regs = IPCC::regs(); + + unsafe { regs.cpu(1).scr().write(|w| w.set_chs(channel as usize, true)) } + } + + pub fn c1_is_active_flag(channel: IpccChannel) -> bool { + let regs = IPCC::regs(); + + unsafe { regs.cpu(0).sr().read().chf(channel as usize) } + } + + pub fn c2_is_active_flag(channel: IpccChannel) -> bool { + let regs = IPCC::regs(); + + unsafe { regs.cpu(1).sr().read().chf(channel as usize) } + } + + pub fn is_tx_pending(channel: IpccChannel) -> bool { + !Self::c1_is_active_flag(channel) && Self::c1_get_tx_channel(channel) + } + + pub fn is_rx_pending(channel: IpccChannel) -> bool { + Self::c2_is_active_flag(channel) && Self::c1_get_rx_channel(channel) + } +} + +impl sealed::Instance for crate::peripherals::IPCC { + fn regs() -> crate::pac::ipcc::Ipcc { + crate::pac::IPCC + } + + fn set_cpu2(enabled: bool) { + unsafe { crate::pac::PWR.cr4().modify(|w| w.set_c2boot(enabled)) } + } +} + +unsafe fn _configure_pwr() { + let rcc = crate::pac::RCC; + + // set RF wake-up clock = LSE + rcc.csr().modify(|w| w.set_rfwkpsel(0b01)); +} -- cgit