From 7e5cd16ca79cf36d2c28c7e2fe35642a27f18b72 Mon Sep 17 00:00:00 2001
From: Daniel Nilsson <daniel.nilsson@dectron.se>
Date: Thu, 13 Nov 2025 14:51:00 +0100
Subject: correcting channel on interval Vbat, adding Vbat resistor disable to
 preserve current when not sampling.

---
 embassy-stm32/src/adc/v3.rs | 22 ++++++++++++++++++++--
 1 file changed, 20 insertions(+), 2 deletions(-)

diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs
index 78b497727..c65357aff 100644
--- a/embassy-stm32/src/adc/v3.rs
+++ b/embassy-stm32/src/adc/v3.rs
@@ -65,7 +65,7 @@ impl<T: Instance> super::SealedSpecialConverter<super::Vbat> for T {
 }
 #[cfg(any(adc_h5, adc_h7rs))]
 impl<T: Instance> super::SealedSpecialConverter<super::Vbat> for T {
-    const CHANNEL: u8 = 2;
+    const CHANNEL: u8 = 16;
 }
 #[cfg(adc_u0)]
 impl<T: Instance> super::SealedSpecialConverter<super::Vbat> for T {
@@ -82,7 +82,7 @@ cfg_if! {
         impl<T: Instance> super::AdcChannel<T> for VddCore {}
         impl<T: Instance> super::SealedAdcChannel<T> for VddCore {
             fn channel(&self) -> u8 {
-                6
+                17
             }
         }
     }
@@ -582,6 +582,24 @@ impl<'d, T: Instance> Adc<'d, T> {
         Vbat {}
     }
 
+    pub fn disable_vbat(&self) {
+        cfg_if! {
+            if #[cfg(any(adc_g0, adc_u0))] {
+                T::regs().ccr().modify(|reg| {
+                    reg.set_vbaten(false);
+                });
+            } else if #[cfg(any(adc_h5, adc_h7rs))] {
+                T::common_regs().ccr().modify(|reg| {
+                    reg.set_vbaten(false);
+                });
+            } else {
+                T::common_regs().ccr().modify(|reg| {
+                    reg.set_ch18sel(false);
+                });
+            }
+        }
+    }
+
     /*
     /// Convert a raw sample from the `Temperature` to deg C
     pub fn to_degrees_centigrade(sample: u16) -> f32 {
-- 
cgit