From ac996e7e0a08f0a8914c76e4ee040e75a4b2b19b Mon Sep 17 00:00:00 2001
From: obe1line <chris.storah@gmail.com>
Date: Mon, 21 Jul 2025 14:31:48 +1000
Subject: Added ccipr1 conditional for STM32C071

---
 embassy-stm32/src/rcc/c0.rs | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/embassy-stm32/src/rcc/c0.rs b/embassy-stm32/src/rcc/c0.rs
index cac2a9149..5a584d993 100644
--- a/embassy-stm32/src/rcc/c0.rs
+++ b/embassy-stm32/src/rcc/c0.rs
@@ -192,8 +192,12 @@ pub(crate) unsafe fn init(config: Config) {
         lse: None,
     );
 
-    RCC.ccipr()
-        .modify(|w| w.set_adc1sel(stm32_metapac::rcc::vals::Adcsel::SYS));
+    #[cfg(not(any(stm32c071)))]
+    let r = RCC.ccipr();
+    #[cfg(any(stm32c071))]
+    let r = RCC.ccipr1();
+
+    r.modify(|w| w.set_adc1sel(stm32_metapac::rcc::vals::Adcsel::SYS));
 }
 
 mod max {
-- 
cgit