From c4b7fde3bc44a0b87b29eb048b76445fa2177e93 Mon Sep 17 00:00:00 2001
From: everdrone <giorgiotropiano@gmail.com>
Date: Wed, 22 Oct 2025 20:01:15 +0200
Subject: allow setting stm32 SAI frame_length to 256

---
 embassy-stm32/src/sai/mod.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/embassy-stm32/src/sai/mod.rs b/embassy-stm32/src/sai/mod.rs
index 726d1729a..08aebfb11 100644
--- a/embassy-stm32/src/sai/mod.rs
+++ b/embassy-stm32/src/sai/mod.rs
@@ -391,7 +391,7 @@ pub struct Config {
     pub frame_sync_polarity: FrameSyncPolarity,
     pub frame_sync_active_level_length: word::U7,
     pub frame_sync_definition: FrameSyncDefinition,
-    pub frame_length: u8,
+    pub frame_length: u16,
     pub clock_strobe: ClockStrobe,
     pub output_drive: OutputDrive,
     pub master_clock_divider: Option<MasterClockDivider>,
-- 
cgit 


From 86c32c8d7ce6100e7b18413efd3e13932cbd9157 Mon Sep 17 00:00:00 2001
From: everdrone <giorgiotropiano@gmail.com>
Date: Thu, 23 Oct 2025 12:04:51 +0200
Subject: Add changelog entry

---
 embassy-stm32/CHANGELOG.md | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/embassy-stm32/CHANGELOG.md b/embassy-stm32/CHANGELOG.md
index 9848daf49..d2a1b9161 100644
--- a/embassy-stm32/CHANGELOG.md
+++ b/embassy-stm32/CHANGELOG.md
@@ -9,6 +9,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 ### [Unreleased]
 
 * **Fix(stm32h5):** Prevent a HardFault crash on STM32H5 devices by changing `uid()` to return `[u8; 12]` by value instead of a reference. (Fixes #2696)
+- fix: Allow setting SAI peripheral `frame_length` to `256`
+
 ## Unreleased - ReleaseDate
 
 - fix flash erase on L4 & L5
-- 
cgit 


From 23833b1716e2de6ac18db23521073e870c13e009 Mon Sep 17 00:00:00 2001
From: everdrone <giorgiotropiano@gmail.com>
Date: Thu, 23 Oct 2025 12:43:58 +0200
Subject: add error message and convert to u8

---
 embassy-stm32/src/sai/mod.rs | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/embassy-stm32/src/sai/mod.rs b/embassy-stm32/src/sai/mod.rs
index 08aebfb11..58e3b832a 100644
--- a/embassy-stm32/src/sai/mod.rs
+++ b/embassy-stm32/src/sai/mod.rs
@@ -696,7 +696,12 @@ impl<'d, T: Instance, W: word::Word> Sai<'d, T, W> {
             w.set_fspol(config.frame_sync_polarity.fspol());
             w.set_fsdef(config.frame_sync_definition.fsdef());
             w.set_fsall(config.frame_sync_active_level_length.0 as u8 - 1);
-            w.set_frl(config.frame_length - 1);
+
+            if config.frame_length > 256 {
+                panic!("Frame length cannot be greater than 256");
+            }
+
+            w.set_frl((config.frame_length - 1) as u8);
         });
 
         ch.slotr().modify(|w| {
-- 
cgit 


From e2807058ffc73bd0fc2f4ce9f29e5a56f3e5a18e Mon Sep 17 00:00:00 2001
From: everdrone <giorgiotropiano@gmail.com>
Date: Thu, 23 Oct 2025 12:49:47 +0200
Subject: fix stm32h723 example

---
 examples/stm32h723/src/bin/spdifrx.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/examples/stm32h723/src/bin/spdifrx.rs b/examples/stm32h723/src/bin/spdifrx.rs
index cdbd69b89..5c29602c6 100644
--- a/examples/stm32h723/src/bin/spdifrx.rs
+++ b/examples/stm32h723/src/bin/spdifrx.rs
@@ -167,7 +167,7 @@ fn new_sai_transmitter<'d>(
     sai_config.slot_count = hal::sai::word::U4(CHANNEL_COUNT as u8);
     sai_config.slot_enable = 0xFFFF; // All slots
     sai_config.data_size = sai::DataSize::Data32;
-    sai_config.frame_length = (CHANNEL_COUNT * 32) as u8;
+    sai_config.frame_length = (CHANNEL_COUNT * 32) as u16;
     sai_config.master_clock_divider = None;
 
     let (sub_block_tx, _) = hal::sai::split_subblocks(sai);
-- 
cgit 


From f440a3e19584aa8c1c5df742b964ae417cf705a1 Mon Sep 17 00:00:00 2001
From: Priit Laes <plaes@plaes.org>
Date: Mon, 3 Nov 2025 23:08:15 +0200
Subject: stm32/timer/simplepwm: Fix docs formatting and clarify timer usage

---
 embassy-stm32/src/timer/simple_pwm.rs | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/embassy-stm32/src/timer/simple_pwm.rs b/embassy-stm32/src/timer/simple_pwm.rs
index 06315d7f3..7597c0eee 100644
--- a/embassy-stm32/src/timer/simple_pwm.rs
+++ b/embassy-stm32/src/timer/simple_pwm.rs
@@ -309,7 +309,9 @@ impl<'d, T: GeneralInstance4Channel> SimplePwm<'d, T> {
     /// Generate a sequence of PWM waveform
     ///
     /// Note:
-    /// you will need to provide corresponding TIMx_UP DMA channel to use this method.
+    /// You will need to provide corresponding `TIMx_UP` DMA channel to use this method.
+    /// Also be aware that embassy timers use one of timers internally. It is possible to
+    /// switch this timer by using `time-driver-timX` feature.
     pub async fn waveform_up(&mut self, dma: Peri<'_, impl super::UpDma<T>>, channel: Channel, duty: &[u16]) {
         #[allow(clippy::let_unit_value)] // eg. stm32f334
         let req = dma.request();
@@ -378,18 +380,23 @@ impl<'d, T: GeneralInstance4Channel> SimplePwm<'d, T> {
     ///
     /// For example, if using channels 1 through 4, a buffer of 4 update steps might look like:
     ///
+    /// ```rust,ignore
     /// let dma_buf: [u16; 16] = [
     ///     ch1_duty_1, ch2_duty_1, ch3_duty_1, ch4_duty_1, // update 1
     ///     ch1_duty_2, ch2_duty_2, ch3_duty_2, ch4_duty_2, // update 2
     ///     ch1_duty_3, ch2_duty_3, ch3_duty_3, ch4_duty_3, // update 3
     ///     ch1_duty_4, ch2_duty_4, ch3_duty_4, ch4_duty_4, // update 4
     /// ];
+    /// ```
     ///
-    /// Each group of N values (where N = number of channels) is transferred on one update event,
+    /// Each group of `N` values (where `N` is number of channels) is transferred on one update event,
     /// updating the duty cycles of all selected channels simultaneously.
     ///
     /// Note:
-    /// you will need to provide corresponding TIMx_UP DMA channel to use this method.
+    /// You will need to provide corresponding `TIMx_UP` DMA channel to use this method.
+    /// Also be aware that embassy timers use one of timers internally. It is possible to
+    /// switch this timer by using `time-driver-timX` feature.
+    ///
     pub async fn waveform_up_multi_channel(
         &mut self,
         dma: Peri<'_, impl super::UpDma<T>>,
-- 
cgit 


From 7e5cd16ca79cf36d2c28c7e2fe35642a27f18b72 Mon Sep 17 00:00:00 2001
From: Daniel Nilsson <daniel.nilsson@dectron.se>
Date: Thu, 13 Nov 2025 14:51:00 +0100
Subject: correcting channel on interval Vbat, adding Vbat resistor disable to
 preserve current when not sampling.

---
 embassy-stm32/src/adc/v3.rs | 22 ++++++++++++++++++++--
 1 file changed, 20 insertions(+), 2 deletions(-)

diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs
index 78b497727..c65357aff 100644
--- a/embassy-stm32/src/adc/v3.rs
+++ b/embassy-stm32/src/adc/v3.rs
@@ -65,7 +65,7 @@ impl<T: Instance> super::SealedSpecialConverter<super::Vbat> for T {
 }
 #[cfg(any(adc_h5, adc_h7rs))]
 impl<T: Instance> super::SealedSpecialConverter<super::Vbat> for T {
-    const CHANNEL: u8 = 2;
+    const CHANNEL: u8 = 16;
 }
 #[cfg(adc_u0)]
 impl<T: Instance> super::SealedSpecialConverter<super::Vbat> for T {
@@ -82,7 +82,7 @@ cfg_if! {
         impl<T: Instance> super::AdcChannel<T> for VddCore {}
         impl<T: Instance> super::SealedAdcChannel<T> for VddCore {
             fn channel(&self) -> u8 {
-                6
+                17
             }
         }
     }
@@ -582,6 +582,24 @@ impl<'d, T: Instance> Adc<'d, T> {
         Vbat {}
     }
 
+    pub fn disable_vbat(&self) {
+        cfg_if! {
+            if #[cfg(any(adc_g0, adc_u0))] {
+                T::regs().ccr().modify(|reg| {
+                    reg.set_vbaten(false);
+                });
+            } else if #[cfg(any(adc_h5, adc_h7rs))] {
+                T::common_regs().ccr().modify(|reg| {
+                    reg.set_vbaten(false);
+                });
+            } else {
+                T::common_regs().ccr().modify(|reg| {
+                    reg.set_ch18sel(false);
+                });
+            }
+        }
+    }
+
     /*
     /// Convert a raw sample from the `Temperature` to deg C
     pub fn to_degrees_centigrade(sample: u16) -> f32 {
-- 
cgit 


From 80eed58c30087d6d61474e8a1ac21da1ea679763 Mon Sep 17 00:00:00 2001
From: Daniel Nilsson <daniel.nilsson@dectron.se>
Date: Fri, 14 Nov 2025 07:58:17 +0100
Subject: splitting up ADC1/2 implementations on Adc to ensure relevant methods
 are only visible on the ADC block where they are supported

---
 embassy-stm32/src/adc/v3.rs | 128 +++++++++++++++++++++++++++-----------------
 1 file changed, 78 insertions(+), 50 deletions(-)

diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs
index c65357aff..3bda0ae54 100644
--- a/embassy-stm32/src/adc/v3.rs
+++ b/embassy-stm32/src/adc/v3.rs
@@ -13,7 +13,7 @@ pub use pac::adc::vals::{Ovsr, Ovss, Presc};
 use super::SealedAdcChannel;
 use super::{Adc, Averaging, Instance, Resolution, SampleTime, Temperature, Vbat, VrefInt, blocking_delay_us};
 use crate::adc::ConversionMode;
-use crate::{Peri, pac, rcc};
+use crate::{Peri, pac, rcc, peripherals};
 
 /// Default VREF voltage used for sample conversion to millivolts.
 pub const VREF_DEFAULT_MV: u32 = 3300;
@@ -489,6 +489,22 @@ impl<'d, T: Instance> Adc<'d, T> {
         s
     }
 
+    #[cfg(any(adc_g0, adc_u0))]
+    pub fn enable_vbat(&self) -> Vbat {
+        T::regs().ccr().modify(|reg| {
+            reg.set_vbaten(true);
+        });
+
+        Vbat { }
+    }
+
+    #[cfg(any(adc_g0, adc_u0))]
+    pub fn disable_vbat(&self) {
+        T::regs().ccr().modify(|reg| {
+            reg.set_vbaten(false);
+        });
+    }
+
     #[cfg(adc_g0)]
     /// Initialize ADC with explicit clock for the analog ADC
     pub fn new_with_clock(adc: Peri<'d, T>, clock: Clock) -> Self {
@@ -525,87 +541,99 @@ impl<'d, T: Instance> Adc<'d, T> {
         Self { adc }
     }
 
-    pub fn enable_vrefint(&self) -> VrefInt {
-        #[cfg(not(any(adc_g0, adc_u0)))]
-        T::common_regs().ccr().modify(|reg| {
-            reg.set_vrefen(true);
-        });
-        #[cfg(any(adc_g0, adc_u0))]
-        T::regs().ccr().modify(|reg| {
-            reg.set_vrefen(true);
-        });
-
-        // "Table 24. Embedded internal voltage reference" states that it takes a maximum of 12 us
-        // to stabilize the internal voltage reference.
-        blocking_delay_us(15);
-
-        VrefInt {}
+    /*
+    /// Convert a raw sample from the `Temperature` to deg C
+    pub fn to_degrees_centigrade(sample: u16) -> f32 {
+        (130.0 - 30.0) / (VtempCal130::get().read() as f32 - VtempCal30::get().read() as f32)
+            * (sample as f32 - VtempCal30::get().read() as f32)
+            + 30.0
     }
+     */
+}
 
-    pub fn enable_temperature(&self) -> Temperature {
+
+#[cfg(not(any(adc_g0, adc_u0)))]
+impl<'d> Adc<'d, peripherals::ADC2> {
+   pub fn enable_vbat(&self) -> Vbat {
         cfg_if! {
-            if #[cfg(any(adc_g0, adc_u0))] {
-                T::regs().ccr().modify(|reg| {
-                    reg.set_tsen(true);
-                });
-            } else if #[cfg(any(adc_h5, adc_h7rs))] {
-                T::common_regs().ccr().modify(|reg| {
-                    reg.set_tsen(true);
+            if #[cfg(any(adc_h5, adc_h7rs))] {
+                pac::ADC12_COMMON.ccr().modify(|reg| {
+                    reg.set_vbaten(true);
                 });
             } else {
-                T::common_regs().ccr().modify(|reg| {
-                    reg.set_ch17sel(true);
+                pac::ADC12_COMMON.ccr().modify(|reg| {
+                    reg.set_ch18sel(true);
                 });
             }
         }
 
-        Temperature {}
+        Vbat { }
     }
 
-    pub fn enable_vbat(&self) -> Vbat {
+    pub fn disable_vbat(&self) {
         cfg_if! {
             if #[cfg(any(adc_g0, adc_u0))] {
-                T::regs().ccr().modify(|reg| {
-                    reg.set_vbaten(true);
+                pac::ADC2.ccr().modify(|reg| {
+                    reg.set_vbaten(false);
                 });
             } else if #[cfg(any(adc_h5, adc_h7rs))] {
-                T::common_regs().ccr().modify(|reg| {
-                    reg.set_vbaten(true);
+                pac::ADC12_COMMON.ccr().modify(|reg| {
+                    reg.set_vbaten(false);
                 });
             } else {
-                T::common_regs().ccr().modify(|reg| {
-                    reg.set_ch18sel(true);
+                pac::ADC12_COMMON.ccr().modify(|reg| {
+                    reg.set_ch18sel(false);
                 });
             }
         }
+    }
 
-        Vbat {}
+    #[cfg(any(adc_h5, adc_h7rs))]
+    pub fn enable_vddcore(&self) -> VddCore {
+        pac::ADC2.or().modify(|reg| {
+            reg.set_op0(true);
+        });
+
+        VddCore { }
     }
+}
 
-    pub fn disable_vbat(&self) {
+
+impl<'d> Adc<'d, peripherals::ADC1> {
+    pub fn enable_vrefint(&self) -> VrefInt {
+        #[cfg(not(any(adc_g0, adc_u0)))]
+        pac::ADC12_COMMON.ccr().modify(|reg| {
+            reg.set_vrefen(true);
+        });
+        #[cfg(any(adc_g0, adc_u0))]
+        pac::ADC1.ccr().modify(|reg| {
+            reg.set_vrefen(true);
+        });
+
+        // "Table 24. Embedded internal voltage reference" states that it takes a maximum of 12 us
+        // to stabilize the internal voltage reference.
+        blocking_delay_us(15);
+
+        VrefInt { }
+    }
+
+    pub fn enable_temperature(&self) -> Temperature {
         cfg_if! {
             if #[cfg(any(adc_g0, adc_u0))] {
-                T::regs().ccr().modify(|reg| {
-                    reg.set_vbaten(false);
+                pac::ADC1.ccr().modify(|reg| {
+                    reg.set_tsen(true);
                 });
             } else if #[cfg(any(adc_h5, adc_h7rs))] {
-                T::common_regs().ccr().modify(|reg| {
-                    reg.set_vbaten(false);
+                pac::ADC12_COMMON.ccr().modify(|reg| {
+                    reg.set_tsen(true);
                 });
             } else {
-                T::common_regs().ccr().modify(|reg| {
-                    reg.set_ch18sel(false);
+                pac::ADC12_COMMON.ccr().modify(|reg| {
+                    reg.set_ch17sel(true);
                 });
             }
         }
-    }
 
-    /*
-    /// Convert a raw sample from the `Temperature` to deg C
-    pub fn to_degrees_centigrade(sample: u16) -> f32 {
-        (130.0 - 30.0) / (VtempCal130::get().read() as f32 - VtempCal30::get().read() as f32)
-            * (sample as f32 - VtempCal30::get().read() as f32)
-            + 30.0
+        Temperature { }
     }
-     */
 }
-- 
cgit 


From 2c75390b8cbb9dd815b53130d03fe0803112a6c6 Mon Sep 17 00:00:00 2001
From: Daniel Nilsson <daniel.nilsson@dectron.se>
Date: Fri, 14 Nov 2025 08:03:17 +0100
Subject: updating changelog

---
 embassy-stm32/CHANGELOG.md | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/embassy-stm32/CHANGELOG.md b/embassy-stm32/CHANGELOG.md
index 8bd930e79..259eaf9c0 100644
--- a/embassy-stm32/CHANGELOG.md
+++ b/embassy-stm32/CHANGELOG.md
@@ -58,6 +58,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 - adc: reogranize and cleanup somewhat. require sample_time to be passed on conversion
 - fix: stm32/i2c v2 slave: prevent misaligned reads, error false positives, and incorrect counts of bytes read/written
 - feat: add flash support for c0 family ([#4874](https://github.com/embassy-rs/embassy/pull/4874))
+- fix: fixing channel numbers on vbat and vddcore for adc on adc
+- adc: splitting up implementations to distinguish ADC1 & 2 hosted internal special channels are only accessible on the relevant block
 
 ## 0.4.0 - 2025-08-26
 
-- 
cgit 


From 9fd57c165997bf575517aea0fde98b930b1c893a Mon Sep 17 00:00:00 2001
From: Daniel Nilsson <daniel.nilsson@dectron.se>
Date: Fri, 14 Nov 2025 08:04:58 +0100
Subject: fixing failed rust fmt ci

---
 embassy-stm32/src/adc/v3.rs | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs
index 3bda0ae54..55fe70f72 100644
--- a/embassy-stm32/src/adc/v3.rs
+++ b/embassy-stm32/src/adc/v3.rs
@@ -594,7 +594,7 @@ impl<'d> Adc<'d, peripherals::ADC2> {
             reg.set_op0(true);
         });
 
-        VddCore { }
+        VddCore {}
     }
 }
 
@@ -614,7 +614,7 @@ impl<'d> Adc<'d, peripherals::ADC1> {
         // to stabilize the internal voltage reference.
         blocking_delay_us(15);
 
-        VrefInt { }
+        VrefInt {}
     }
 
     pub fn enable_temperature(&self) -> Temperature {
@@ -634,6 +634,6 @@ impl<'d> Adc<'d, peripherals::ADC1> {
             }
         }
 
-        Temperature { }
+        Temperature {}
     }
 }
-- 
cgit 


From f7c1aba09f7ef0b99396dc626d5d8c575f5b18e4 Mon Sep 17 00:00:00 2001
From: Daniel Nilsson <daniel.nilsson@dectron.se>
Date: Fri, 14 Nov 2025 08:06:18 +0100
Subject: fixing one more failed rust fmt ci

---
 embassy-stm32/src/adc/v3.rs | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs
index 55fe70f72..51e1e654b 100644
--- a/embassy-stm32/src/adc/v3.rs
+++ b/embassy-stm32/src/adc/v3.rs
@@ -495,7 +495,7 @@ impl<'d, T: Instance> Adc<'d, T> {
             reg.set_vbaten(true);
         });
 
-        Vbat { }
+        Vbat {}
     }
 
     #[cfg(any(adc_g0, adc_u0))]
@@ -567,7 +567,7 @@ impl<'d> Adc<'d, peripherals::ADC2> {
             }
         }
 
-        Vbat { }
+        Vbat {}
     }
 
     pub fn disable_vbat(&self) {
-- 
cgit 


From 3bbc2515062046638cc19edb0f02f1490de21087 Mon Sep 17 00:00:00 2001
From: Daniel Nilsson <daniel.nilsson@dectron.se>
Date: Fri, 14 Nov 2025 08:12:14 +0100
Subject: indention fix

---
 embassy-stm32/src/adc/v3.rs | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs
index 51e1e654b..54824c253 100644
--- a/embassy-stm32/src/adc/v3.rs
+++ b/embassy-stm32/src/adc/v3.rs
@@ -13,7 +13,7 @@ pub use pac::adc::vals::{Ovsr, Ovss, Presc};
 use super::SealedAdcChannel;
 use super::{Adc, Averaging, Instance, Resolution, SampleTime, Temperature, Vbat, VrefInt, blocking_delay_us};
 use crate::adc::ConversionMode;
-use crate::{Peri, pac, rcc, peripherals};
+use crate::{Peri, pac, peripherals, rcc};
 
 /// Default VREF voltage used for sample conversion to millivolts.
 pub const VREF_DEFAULT_MV: u32 = 3300;
@@ -554,7 +554,7 @@ impl<'d, T: Instance> Adc<'d, T> {
 
 #[cfg(not(any(adc_g0, adc_u0)))]
 impl<'d> Adc<'d, peripherals::ADC2> {
-   pub fn enable_vbat(&self) -> Vbat {
+    pub fn enable_vbat(&self) -> Vbat {
         cfg_if! {
             if #[cfg(any(adc_h5, adc_h7rs))] {
                 pac::ADC12_COMMON.ccr().modify(|reg| {
-- 
cgit 


From 31a6bb84bc27c79640edb490d2a96117a413375e Mon Sep 17 00:00:00 2001
From: Daniel Nilsson <daniel.nilsson@dectron.se>
Date: Fri, 14 Nov 2025 08:14:42 +0100
Subject: ci fix: whitespace removal

---
 embassy-stm32/src/adc/v3.rs | 2 --
 1 file changed, 2 deletions(-)

diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs
index 54824c253..8559d0697 100644
--- a/embassy-stm32/src/adc/v3.rs
+++ b/embassy-stm32/src/adc/v3.rs
@@ -551,7 +551,6 @@ impl<'d, T: Instance> Adc<'d, T> {
      */
 }
 
-
 #[cfg(not(any(adc_g0, adc_u0)))]
 impl<'d> Adc<'d, peripherals::ADC2> {
     pub fn enable_vbat(&self) -> Vbat {
@@ -598,7 +597,6 @@ impl<'d> Adc<'d, peripherals::ADC2> {
     }
 }
 
-
 impl<'d> Adc<'d, peripherals::ADC1> {
     pub fn enable_vrefint(&self) -> VrefInt {
         #[cfg(not(any(adc_g0, adc_u0)))]
-- 
cgit 


From d866a7f73775e0694f9c9a280df9d3603cb52541 Mon Sep 17 00:00:00 2001
From: Daniel Nilsson <daniel.nilsson@dectron.se>
Date: Fri, 14 Nov 2025 08:42:46 +0100
Subject: walking around stm32wb differences

---
 embassy-stm32/src/adc/v3.rs | 29 +++++++++++++++++++----------
 1 file changed, 19 insertions(+), 10 deletions(-)

diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs
index 8559d0697..b833247a9 100644
--- a/embassy-stm32/src/adc/v3.rs
+++ b/embassy-stm32/src/adc/v3.rs
@@ -551,7 +551,7 @@ impl<'d, T: Instance> Adc<'d, T> {
      */
 }
 
-#[cfg(not(any(adc_g0, adc_u0)))]
+#[cfg(not(any(adc_g0, adc_u0, stm32wb)))]
 impl<'d> Adc<'d, peripherals::ADC2> {
     pub fn enable_vbat(&self) -> Vbat {
         cfg_if! {
@@ -599,14 +599,21 @@ impl<'d> Adc<'d, peripherals::ADC2> {
 
 impl<'d> Adc<'d, peripherals::ADC1> {
     pub fn enable_vrefint(&self) -> VrefInt {
-        #[cfg(not(any(adc_g0, adc_u0)))]
-        pac::ADC12_COMMON.ccr().modify(|reg| {
-            reg.set_vrefen(true);
-        });
-        #[cfg(any(adc_g0, adc_u0))]
-        pac::ADC1.ccr().modify(|reg| {
-            reg.set_vrefen(true);
-        });
+        cfg_if! {
+            if #[cfg(not(any(adc_g0, adc_u0, stm32wb)))] {
+                pac::ADC12_COMMON.ccr().modify(|reg| {
+                    reg.set_vrefen(true);
+                });
+            } else if #[cfg(any(adc_g0, adc_u0))] {
+                pac::ADC1.ccr().modify(|reg| {
+                    reg.set_vrefen(true);
+                });
+            } else {
+                pac::ADC1_COMMON.ccr().modify(|reg| {
+                    reg.set_vrefen(true);
+                });
+            }
+        }
 
         // "Table 24. Embedded internal voltage reference" states that it takes a maximum of 12 us
         // to stabilize the internal voltage reference.
@@ -625,10 +632,12 @@ impl<'d> Adc<'d, peripherals::ADC1> {
                 pac::ADC12_COMMON.ccr().modify(|reg| {
                     reg.set_tsen(true);
                 });
+            } else if #[cfg(any(stm32wb))] {
+                todo!();
             } else {
                 pac::ADC12_COMMON.ccr().modify(|reg| {
                     reg.set_ch17sel(true);
-                });
+                });                
             }
         }
 
-- 
cgit 


From 536b4e8fe3a62fae25bd3b1d2ae0f196bfb734f9 Mon Sep 17 00:00:00 2001
From: Daniel Nilsson <daniel.nilsson@dectron.se>
Date: Fri, 14 Nov 2025 08:52:08 +0100
Subject: walking around ci unreachable code warning

---
 embassy-stm32/src/adc/v3.rs | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs
index b833247a9..e4ccaba53 100644
--- a/embassy-stm32/src/adc/v3.rs
+++ b/embassy-stm32/src/adc/v3.rs
@@ -11,7 +11,8 @@ pub use pac::adc::vals::{Ovsr, Ovss, Presc};
 
 #[allow(unused_imports)]
 use super::SealedAdcChannel;
-use super::{Adc, Averaging, Instance, Resolution, SampleTime, Temperature, Vbat, VrefInt, blocking_delay_us};
+#[allow(unused_imports)]
+use super::{Adc, Avergaing, Instance, Resolution, SampleTime, Temperature, Vbat, VrefInt, blocking_delay_us};
 use crate::adc::ConversionMode;
 use crate::{Peri, pac, peripherals, rcc};
 
@@ -628,19 +629,24 @@ impl<'d> Adc<'d, peripherals::ADC1> {
                 pac::ADC1.ccr().modify(|reg| {
                     reg.set_tsen(true);
                 });
+
+                Temperature {}
             } else if #[cfg(any(adc_h5, adc_h7rs))] {
                 pac::ADC12_COMMON.ccr().modify(|reg| {
                     reg.set_tsen(true);
                 });
+
+                Temperature {}
             } else if #[cfg(any(stm32wb))] {
                 todo!();
             } else {
                 pac::ADC12_COMMON.ccr().modify(|reg| {
                     reg.set_ch17sel(true);
                 });                
+
+                Temperature {}
             }
         }
 
-        Temperature {}
     }
 }
-- 
cgit 


From 00f80b56c3f72db31117427d6294df19b7401f2e Mon Sep 17 00:00:00 2001
From: Daniel Nilsson <daniel.nilsson@dectron.se>
Date: Fri, 14 Nov 2025 08:53:33 +0100
Subject: whitespace fix..

---
 embassy-stm32/src/adc/v3.rs | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs
index e4ccaba53..e6ead5dcf 100644
--- a/embassy-stm32/src/adc/v3.rs
+++ b/embassy-stm32/src/adc/v3.rs
@@ -642,11 +642,10 @@ impl<'d> Adc<'d, peripherals::ADC1> {
             } else {
                 pac::ADC12_COMMON.ccr().modify(|reg| {
                     reg.set_ch17sel(true);
-                });                
+                });
 
                 Temperature {}
             }
         }
-
     }
 }
-- 
cgit 


From 31908a26e0ef597511af25b7ffb50f7c64e85560 Mon Sep 17 00:00:00 2001
From: Daniel Nilsson <daniel.nilsson@dectron.se>
Date: Fri, 14 Nov 2025 09:32:26 +0100
Subject: import spelling error fix

---
 embassy-stm32/src/adc/v3.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs
index e6ead5dcf..ce02168ba 100644
--- a/embassy-stm32/src/adc/v3.rs
+++ b/embassy-stm32/src/adc/v3.rs
@@ -12,7 +12,7 @@ pub use pac::adc::vals::{Ovsr, Ovss, Presc};
 #[allow(unused_imports)]
 use super::SealedAdcChannel;
 #[allow(unused_imports)]
-use super::{Adc, Avergaing, Instance, Resolution, SampleTime, Temperature, Vbat, VrefInt, blocking_delay_us};
+use super::{Adc, Averaging, Instance, Resolution, SampleTime, Temperature, Vbat, VrefInt, blocking_delay_us};
 use crate::adc::ConversionMode;
 use crate::{Peri, pac, peripherals, rcc};
 
-- 
cgit 


From 20c75352c388546e8d105d03837c06f32d28ffbc Mon Sep 17 00:00:00 2001
From: Daniel Nilsson <daniel.nilsson@dectron.se>
Date: Fri, 14 Nov 2025 10:10:42 +0100
Subject: adding support for stm32l4

---
 embassy-stm32/src/adc/v3.rs | 32 +++++++++++++++++++++++---------
 1 file changed, 23 insertions(+), 9 deletions(-)

diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs
index ce02168ba..93219168d 100644
--- a/embassy-stm32/src/adc/v3.rs
+++ b/embassy-stm32/src/adc/v3.rs
@@ -560,6 +560,10 @@ impl<'d> Adc<'d, peripherals::ADC2> {
                 pac::ADC12_COMMON.ccr().modify(|reg| {
                     reg.set_vbaten(true);
                 });
+            } else if #[cfg(stm32l4)] {
+                pac::ADC123_COMMON.ccr().modify(|reg| {
+                    reg.set_ch18sel(true);
+                });
             } else {
                 pac::ADC12_COMMON.ccr().modify(|reg| {
                     reg.set_ch18sel(true);
@@ -572,18 +576,18 @@ impl<'d> Adc<'d, peripherals::ADC2> {
 
     pub fn disable_vbat(&self) {
         cfg_if! {
-            if #[cfg(any(adc_g0, adc_u0))] {
-                pac::ADC2.ccr().modify(|reg| {
-                    reg.set_vbaten(false);
-                });
-            } else if #[cfg(any(adc_h5, adc_h7rs))] {
+            if #[cfg(any(adc_h5, adc_h7rs))] {
                 pac::ADC12_COMMON.ccr().modify(|reg| {
                     reg.set_vbaten(false);
                 });
+            } else if #[cfg(stm32l4)] {
+                pac::ADC123_COMMON.ccr().modify(|reg| {
+                    reg.set_ch18sel(false);
+                });
             } else {
                 pac::ADC12_COMMON.ccr().modify(|reg| {
                     reg.set_ch18sel(false);
-                });
+                });                
             }
         }
     }
@@ -601,7 +605,7 @@ impl<'d> Adc<'d, peripherals::ADC2> {
 impl<'d> Adc<'d, peripherals::ADC1> {
     pub fn enable_vrefint(&self) -> VrefInt {
         cfg_if! {
-            if #[cfg(not(any(adc_g0, adc_u0, stm32wb)))] {
+            if #[cfg(any(adc_h5, adc_h7rs))] {
                 pac::ADC12_COMMON.ccr().modify(|reg| {
                     reg.set_vrefen(true);
                 });
@@ -609,6 +613,10 @@ impl<'d> Adc<'d, peripherals::ADC1> {
                 pac::ADC1.ccr().modify(|reg| {
                     reg.set_vrefen(true);
                 });
+            } else if #[cfg(stm32l4)] {
+                pac::ADC123_COMMON.ccr().modify(|reg| {
+                    reg.set_vrefen(true);
+                });
             } else {
                 pac::ADC1_COMMON.ccr().modify(|reg| {
                     reg.set_vrefen(true);
@@ -637,8 +645,14 @@ impl<'d> Adc<'d, peripherals::ADC1> {
                 });
 
                 Temperature {}
-            } else if #[cfg(any(stm32wb))] {
-                todo!();
+            } else if #[cfg(stm32wb)] {
+                todo();
+            } else if #[cfg(stm32l4)] {
+                pac::ADC123_COMMON.ccr().modify(|reg| {
+                    reg.set_ch17sel(true);
+                });
+
+                Temperature {}
             } else {
                 pac::ADC12_COMMON.ccr().modify(|reg| {
                     reg.set_ch17sel(true);
-- 
cgit 


From 2cdefb7d09a6c77e325c8fc074017873fb0296ac Mon Sep 17 00:00:00 2001
From: Daniel Nilsson <daniel.nilsson@dectron.se>
Date: Fri, 14 Nov 2025 10:17:33 +0100
Subject: fix whitespace issues

---
 embassy-stm32/src/adc/v3.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs
index 93219168d..072d6e592 100644
--- a/embassy-stm32/src/adc/v3.rs
+++ b/embassy-stm32/src/adc/v3.rs
@@ -587,7 +587,7 @@ impl<'d> Adc<'d, peripherals::ADC2> {
             } else {
                 pac::ADC12_COMMON.ccr().modify(|reg| {
                     reg.set_ch18sel(false);
-                });                
+                });
             }
         }
     }
-- 
cgit 


From 7ddee557405bbd11a2915818044b508158aa149f Mon Sep 17 00:00:00 2001
From: Daniel Nilsson <daniel.nilsson@dectron.se>
Date: Fri, 14 Nov 2025 10:37:04 +0100
Subject: misspelled todo macro

---
 embassy-stm32/src/adc/v3.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs
index 072d6e592..c77a1d4f5 100644
--- a/embassy-stm32/src/adc/v3.rs
+++ b/embassy-stm32/src/adc/v3.rs
@@ -646,7 +646,7 @@ impl<'d> Adc<'d, peripherals::ADC1> {
 
                 Temperature {}
             } else if #[cfg(stm32wb)] {
-                todo();
+                todo!();
             } else if #[cfg(stm32l4)] {
                 pac::ADC123_COMMON.ccr().modify(|reg| {
                     reg.set_ch17sel(true);
-- 
cgit 


From 842ee9bef98975d2a874a425983cfad59610a963 Mon Sep 17 00:00:00 2001
From: Daniel Nilsson <daniel.nilsson@dectron.se>
Date: Fri, 14 Nov 2025 11:15:42 +0100
Subject: undoing channel split

---
 embassy-stm32/src/adc/v3.rs | 154 ++++++++++++++------------------------------
 1 file changed, 50 insertions(+), 104 deletions(-)

diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs
index c77a1d4f5..c65357aff 100644
--- a/embassy-stm32/src/adc/v3.rs
+++ b/embassy-stm32/src/adc/v3.rs
@@ -11,10 +11,9 @@ pub use pac::adc::vals::{Ovsr, Ovss, Presc};
 
 #[allow(unused_imports)]
 use super::SealedAdcChannel;
-#[allow(unused_imports)]
 use super::{Adc, Averaging, Instance, Resolution, SampleTime, Temperature, Vbat, VrefInt, blocking_delay_us};
 use crate::adc::ConversionMode;
-use crate::{Peri, pac, peripherals, rcc};
+use crate::{Peri, pac, rcc};
 
 /// Default VREF voltage used for sample conversion to millivolts.
 pub const VREF_DEFAULT_MV: u32 = 3300;
@@ -490,22 +489,6 @@ impl<'d, T: Instance> Adc<'d, T> {
         s
     }
 
-    #[cfg(any(adc_g0, adc_u0))]
-    pub fn enable_vbat(&self) -> Vbat {
-        T::regs().ccr().modify(|reg| {
-            reg.set_vbaten(true);
-        });
-
-        Vbat {}
-    }
-
-    #[cfg(any(adc_g0, adc_u0))]
-    pub fn disable_vbat(&self) {
-        T::regs().ccr().modify(|reg| {
-            reg.set_vbaten(false);
-        });
-    }
-
     #[cfg(adc_g0)]
     /// Initialize ADC with explicit clock for the analog ADC
     pub fn new_with_clock(adc: Peri<'d, T>, clock: Clock) -> Self {
@@ -542,124 +525,87 @@ impl<'d, T: Instance> Adc<'d, T> {
         Self { adc }
     }
 
-    /*
-    /// Convert a raw sample from the `Temperature` to deg C
-    pub fn to_degrees_centigrade(sample: u16) -> f32 {
-        (130.0 - 30.0) / (VtempCal130::get().read() as f32 - VtempCal30::get().read() as f32)
-            * (sample as f32 - VtempCal30::get().read() as f32)
-            + 30.0
-    }
-     */
-}
+    pub fn enable_vrefint(&self) -> VrefInt {
+        #[cfg(not(any(adc_g0, adc_u0)))]
+        T::common_regs().ccr().modify(|reg| {
+            reg.set_vrefen(true);
+        });
+        #[cfg(any(adc_g0, adc_u0))]
+        T::regs().ccr().modify(|reg| {
+            reg.set_vrefen(true);
+        });
 
-#[cfg(not(any(adc_g0, adc_u0, stm32wb)))]
-impl<'d> Adc<'d, peripherals::ADC2> {
-    pub fn enable_vbat(&self) -> Vbat {
-        cfg_if! {
-            if #[cfg(any(adc_h5, adc_h7rs))] {
-                pac::ADC12_COMMON.ccr().modify(|reg| {
-                    reg.set_vbaten(true);
-                });
-            } else if #[cfg(stm32l4)] {
-                pac::ADC123_COMMON.ccr().modify(|reg| {
-                    reg.set_ch18sel(true);
-                });
-            } else {
-                pac::ADC12_COMMON.ccr().modify(|reg| {
-                    reg.set_ch18sel(true);
-                });
-            }
-        }
+        // "Table 24. Embedded internal voltage reference" states that it takes a maximum of 12 us
+        // to stabilize the internal voltage reference.
+        blocking_delay_us(15);
 
-        Vbat {}
+        VrefInt {}
     }
 
-    pub fn disable_vbat(&self) {
+    pub fn enable_temperature(&self) -> Temperature {
         cfg_if! {
-            if #[cfg(any(adc_h5, adc_h7rs))] {
-                pac::ADC12_COMMON.ccr().modify(|reg| {
-                    reg.set_vbaten(false);
+            if #[cfg(any(adc_g0, adc_u0))] {
+                T::regs().ccr().modify(|reg| {
+                    reg.set_tsen(true);
                 });
-            } else if #[cfg(stm32l4)] {
-                pac::ADC123_COMMON.ccr().modify(|reg| {
-                    reg.set_ch18sel(false);
+            } else if #[cfg(any(adc_h5, adc_h7rs))] {
+                T::common_regs().ccr().modify(|reg| {
+                    reg.set_tsen(true);
                 });
             } else {
-                pac::ADC12_COMMON.ccr().modify(|reg| {
-                    reg.set_ch18sel(false);
+                T::common_regs().ccr().modify(|reg| {
+                    reg.set_ch17sel(true);
                 });
             }
         }
-    }
-
-    #[cfg(any(adc_h5, adc_h7rs))]
-    pub fn enable_vddcore(&self) -> VddCore {
-        pac::ADC2.or().modify(|reg| {
-            reg.set_op0(true);
-        });
 
-        VddCore {}
+        Temperature {}
     }
-}
 
-impl<'d> Adc<'d, peripherals::ADC1> {
-    pub fn enable_vrefint(&self) -> VrefInt {
+    pub fn enable_vbat(&self) -> Vbat {
         cfg_if! {
-            if #[cfg(any(adc_h5, adc_h7rs))] {
-                pac::ADC12_COMMON.ccr().modify(|reg| {
-                    reg.set_vrefen(true);
-                });
-            } else if #[cfg(any(adc_g0, adc_u0))] {
-                pac::ADC1.ccr().modify(|reg| {
-                    reg.set_vrefen(true);
+            if #[cfg(any(adc_g0, adc_u0))] {
+                T::regs().ccr().modify(|reg| {
+                    reg.set_vbaten(true);
                 });
-            } else if #[cfg(stm32l4)] {
-                pac::ADC123_COMMON.ccr().modify(|reg| {
-                    reg.set_vrefen(true);
+            } else if #[cfg(any(adc_h5, adc_h7rs))] {
+                T::common_regs().ccr().modify(|reg| {
+                    reg.set_vbaten(true);
                 });
             } else {
-                pac::ADC1_COMMON.ccr().modify(|reg| {
-                    reg.set_vrefen(true);
+                T::common_regs().ccr().modify(|reg| {
+                    reg.set_ch18sel(true);
                 });
             }
         }
 
-        // "Table 24. Embedded internal voltage reference" states that it takes a maximum of 12 us
-        // to stabilize the internal voltage reference.
-        blocking_delay_us(15);
-
-        VrefInt {}
+        Vbat {}
     }
 
-    pub fn enable_temperature(&self) -> Temperature {
+    pub fn disable_vbat(&self) {
         cfg_if! {
             if #[cfg(any(adc_g0, adc_u0))] {
-                pac::ADC1.ccr().modify(|reg| {
-                    reg.set_tsen(true);
+                T::regs().ccr().modify(|reg| {
+                    reg.set_vbaten(false);
                 });
-
-                Temperature {}
             } else if #[cfg(any(adc_h5, adc_h7rs))] {
-                pac::ADC12_COMMON.ccr().modify(|reg| {
-                    reg.set_tsen(true);
-                });
-
-                Temperature {}
-            } else if #[cfg(stm32wb)] {
-                todo!();
-            } else if #[cfg(stm32l4)] {
-                pac::ADC123_COMMON.ccr().modify(|reg| {
-                    reg.set_ch17sel(true);
+                T::common_regs().ccr().modify(|reg| {
+                    reg.set_vbaten(false);
                 });
-
-                Temperature {}
             } else {
-                pac::ADC12_COMMON.ccr().modify(|reg| {
-                    reg.set_ch17sel(true);
+                T::common_regs().ccr().modify(|reg| {
+                    reg.set_ch18sel(false);
                 });
-
-                Temperature {}
             }
         }
     }
+
+    /*
+    /// Convert a raw sample from the `Temperature` to deg C
+    pub fn to_degrees_centigrade(sample: u16) -> f32 {
+        (130.0 - 30.0) / (VtempCal130::get().read() as f32 - VtempCal30::get().read() as f32)
+            * (sample as f32 - VtempCal30::get().read() as f32)
+            + 30.0
+    }
+     */
 }
-- 
cgit 


From 34b5b4eb92de4c135156c52ce3d5b59c14a5c841 Mon Sep 17 00:00:00 2001
From: Daniel Nilsson <daniel.nilsson@dectron.se>
Date: Fri, 14 Nov 2025 11:17:02 +0100
Subject: adjusting changelog

---
 embassy-stm32/CHANGELOG.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/embassy-stm32/CHANGELOG.md b/embassy-stm32/CHANGELOG.md
index 259eaf9c0..9153e15b9 100644
--- a/embassy-stm32/CHANGELOG.md
+++ b/embassy-stm32/CHANGELOG.md
@@ -59,7 +59,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 - fix: stm32/i2c v2 slave: prevent misaligned reads, error false positives, and incorrect counts of bytes read/written
 - feat: add flash support for c0 family ([#4874](https://github.com/embassy-rs/embassy/pull/4874))
 - fix: fixing channel numbers on vbat and vddcore for adc on adc
-- adc: splitting up implementations to distinguish ADC1 & 2 hosted internal special channels are only accessible on the relevant block
+- adc: adding disable to vbat
 
 ## 0.4.0 - 2025-08-26
 
-- 
cgit 


From a2c5a0d9480b99cdb09940637354bc61405ed7bd Mon Sep 17 00:00:00 2001
From: xoviat <xoviat@users.noreply.github.com>
Date: Fri, 14 Nov 2025 10:17:45 -0600
Subject: adc: fix g4 injected sequence

---
 embassy-stm32/src/adc/g4.rs | 23 +++++++++++++++--------
 1 file changed, 15 insertions(+), 8 deletions(-)

diff --git a/embassy-stm32/src/adc/g4.rs b/embassy-stm32/src/adc/g4.rs
index 514734017..bd8ccbf17 100644
--- a/embassy-stm32/src/adc/g4.rs
+++ b/embassy-stm32/src/adc/g4.rs
@@ -1,3 +1,5 @@
+#[cfg(stm32g4)]
+use pac::adc::regs::Difsel as DifselReg;
 #[allow(unused)]
 #[cfg(stm32h7)]
 use pac::adc::vals::{Adcaldif, Difsel, Exten};
@@ -179,6 +181,9 @@ impl<T: Instance> super::SealedAnyInstance for T {
             w.set_l(sequence.len() as u8 - 1);
         });
 
+        #[cfg(stm32g4)]
+        let mut difsel = DifselReg::default();
+
         // Configure channels and ranks
         for (_i, ((ch, is_differential), sample_time)) in sequence.enumerate() {
             let sample_time = sample_time.into();
@@ -214,10 +219,8 @@ impl<T: Instance> super::SealedAnyInstance for T {
 
             #[cfg(stm32g4)]
             {
-                T::regs().cr().modify(|w| w.set_aden(false)); // disable adc
-
-                T::regs().difsel().modify(|w| {
-                    w.set_difsel(
+                if ch < 18 {
+                    difsel.set_difsel(
                         ch.into(),
                         if is_differential {
                             Difsel::DIFFERENTIAL
@@ -225,11 +228,16 @@ impl<T: Instance> super::SealedAnyInstance for T {
                             Difsel::SINGLE_ENDED
                         },
                     );
-                });
-
-                T::regs().cr().modify(|w| w.set_aden(true)); // enable adc
+                }
             }
         }
+
+        #[cfg(stm32g4)]
+        {
+            T::regs().cr().modify(|w| w.set_aden(false));
+            T::regs().difsel().write_value(difsel);
+            T::enable();
+        }
     }
 }
 
@@ -412,7 +420,6 @@ impl<'d, T: Instance + AnyInstance> Adc<'d, T> {
             NR_INJECTED_RANKS
         );
 
-        T::stop();
         T::enable();
 
         T::regs().jsqr().modify(|w| w.set_jl(N as u8 - 1));
-- 
cgit 


From 3fb16229c7a237c29731aa05d5f29e8ea2eb015f Mon Sep 17 00:00:00 2001
From: everdrone <giorgiotropiano@gmail.com>
Date: Sat, 15 Nov 2025 18:07:10 +0100
Subject: use try_into and unwrap

---
 embassy-stm32/src/sai/mod.rs | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/embassy-stm32/src/sai/mod.rs b/embassy-stm32/src/sai/mod.rs
index 58e3b832a..ce4bc43c3 100644
--- a/embassy-stm32/src/sai/mod.rs
+++ b/embassy-stm32/src/sai/mod.rs
@@ -696,12 +696,7 @@ impl<'d, T: Instance, W: word::Word> Sai<'d, T, W> {
             w.set_fspol(config.frame_sync_polarity.fspol());
             w.set_fsdef(config.frame_sync_definition.fsdef());
             w.set_fsall(config.frame_sync_active_level_length.0 as u8 - 1);
-
-            if config.frame_length > 256 {
-                panic!("Frame length cannot be greater than 256");
-            }
-
-            w.set_frl((config.frame_length - 1) as u8);
+            w.set_frl((config.frame_length - 1).try_into().unwrap());
         });
 
         ch.slotr().modify(|w| {
-- 
cgit