From c531af42c8dd2eaeb56ef1891396ac559918560e Mon Sep 17 00:00:00 2001
From: HybridChild <esbendn@tutanota.com>
Date: Thu, 7 Aug 2025 10:34:29 +0200
Subject: Revert "stm32/i2c: Add temporary trait for version-specific
 initialization during v1 rework"

This reverts commit d38e1de962b92d1d48f1991ce09e494ea46d3f7f.
---
 embassy-stm32/src/i2c/mod.rs | 21 +--------------------
 embassy-stm32/src/i2c/v1.rs  | 38 ++++++++------------------------------
 embassy-stm32/src/i2c/v2.rs  |  4 ----
 3 files changed, 9 insertions(+), 54 deletions(-)

diff --git a/embassy-stm32/src/i2c/mod.rs b/embassy-stm32/src/i2c/mod.rs
index 660b8144a..675a392f9 100644
--- a/embassy-stm32/src/i2c/mod.rs
+++ b/embassy-stm32/src/i2c/mod.rs
@@ -29,21 +29,6 @@ use crate::rcc::{RccInfo, SealedRccPeripheral};
 use crate::time::Hertz;
 use crate::{interrupt, peripherals};
 
-/// Temporary trait for version-specific initialization during I2C v1 async rework.
-/// 
-/// This trait allows the shared constructor in mod.rs to call version-specific 
-/// initialization while we incrementally migrate v1 async operations to use 
-/// the new event-driven interrupt pattern. Will be removed once the rework 
-/// is complete and both blocking/async modes use unified initialization.
-pub trait VersionSpecificInit {
-    /// Performs version and mode-specific initialization.
-    /// 
-    /// For v1: Sets interrupt pattern flag based on blocking vs async mode.
-    /// For v2: No-op, does nothing.
-    fn version_specific_init(&mut self);
-}
-
-
 /// I2C error.
 #[derive(Debug, PartialEq, Eq, Copy, Clone)]
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
@@ -207,10 +192,7 @@ impl<'d> I2c<'d, Blocking, Master> {
     }
 }
 
-impl<'d, M: Mode> I2c<'d, M, Master>
-where 
-    Self: VersionSpecificInit
-{
+impl<'d, M: Mode> I2c<'d, M, Master> {
     /// Create a new I2C driver.
     fn new_inner<T: Instance>(
         _peri: Peri<'d, T>,
@@ -241,7 +223,6 @@ where
         };
 
         this.enable_and_init(config);
-        this.version_specific_init();
 
         this
     }
diff --git a/embassy-stm32/src/i2c/v1.rs b/embassy-stm32/src/i2c/v1.rs
index ef5624d97..f2fd0147e 100644
--- a/embassy-stm32/src/i2c/v1.rs
+++ b/embassy-stm32/src/i2c/v1.rs
@@ -6,7 +6,6 @@
 
 use core::future::poll_fn;
 use core::task::Poll;
-use core::sync::atomic::{AtomicBool, Ordering};
 
 use embassy_embedded_hal::SetConfig;
 use embassy_futures::select::{select, Either};
@@ -23,14 +22,12 @@ use embassy_sync::waitqueue::AtomicWaker;
 /// I2C v2 peripheral state  
 pub(crate) struct State {
     pub(crate) waker: AtomicWaker,
-    pub use_new_interrupt_pattern: AtomicBool,
 }
 
 impl State {
     pub(crate) const fn new() -> Self {
         Self {
             waker: AtomicWaker::new(),
-            use_new_interrupt_pattern: AtomicBool::new(false),
         }
     }
 }
@@ -47,25 +44,17 @@ impl State {
 // There's some more details there, and we might have a fix for you. But please let us know if you
 // hit a case like this!
 pub unsafe fn on_interrupt<T: Instance>() {
+    let regs = T::info().regs;
     // i2c v2 only woke the task on transfer complete interrupts. v1 uses interrupts for a bunch of
     // other stuff, so we wake the task on every interrupt.
-
-    let regs = T::info().regs;
-    let state = T::state();
-
-    if state.use_new_interrupt_pattern.load(Ordering::Relaxed) {
-        
-    } else {
-        critical_section::with(|_| {
-            // Clear event interrupt flag.
-            regs.cr2().modify(|w| {
-                w.set_itevten(false);
-                w.set_iterren(false);
-            });
+    T::state().waker.wake();
+    critical_section::with(|_| {
+        // Clear event interrupt flag.
+        regs.cr2().modify(|w| {
+            w.set_itevten(false);
+            w.set_iterren(false);
         });
-    }
-
-    state.waker.wake();
+    });
 }
 
 impl<'d, M: Mode, IM: MasterMode> I2c<'d, M, IM> {
@@ -727,17 +716,6 @@ impl<'d, IM: MasterMode> I2c<'d, Async, IM> {
     }
 }
 
-impl<'d> VersionSpecificInit for I2c<'d, Blocking, Master> {
-    fn version_specific_init(&mut self) {
-        self.state.use_new_interrupt_pattern.store(false, Ordering::Relaxed);
-    }
-}
-
-impl<'d> VersionSpecificInit for I2c<'d, Async, Master> {
-    fn version_specific_init(&mut self) {
-        self.state.use_new_interrupt_pattern.store(true, Ordering::Relaxed);
-    }
-}
 
 /// Timing configuration for I2C v1 hardware
 /// 
diff --git a/embassy-stm32/src/i2c/v2.rs b/embassy-stm32/src/i2c/v2.rs
index f23c58c9e..72a7d05ab 100644
--- a/embassy-stm32/src/i2c/v2.rs
+++ b/embassy-stm32/src/i2c/v2.rs
@@ -107,10 +107,6 @@ pub(crate) unsafe fn on_interrupt<T: Instance>() {
     });
 }
 
-impl<'d, M: Mode> VersionSpecificInit for I2c<'d, M, Master> {
-    fn version_specific_init(&mut self) {}
-}
-
 impl<'d, M: Mode, IM: MasterMode> I2c<'d, M, IM> {
     pub(crate) fn init(&mut self, config: Config) {
         self.info.regs.cr1().modify(|reg| {
-- 
cgit