From e6e42001a65e2c77cdb6995b7f689fbb4d10d045 Mon Sep 17 00:00:00 2001
From: everdrone <giorgiotropiano@gmail.com>
Date: Sun, 21 Sep 2025 14:50:54 +0200
Subject: Use N6 registers for MCOxSEL and MCOxPRE

---
 embassy-stm32/src/rcc/mco.rs | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/embassy-stm32/src/rcc/mco.rs b/embassy-stm32/src/rcc/mco.rs
index 3d0f510c0..a8f8cfcff 100644
--- a/embassy-stm32/src/rcc/mco.rs
+++ b/embassy-stm32/src/rcc/mco.rs
@@ -61,10 +61,12 @@ macro_rules! impl_peri {
             type Source = $source;
 
             unsafe fn _apply_clock_settings(source: Self::Source, _prescaler: McoPrescaler) {
-                #[cfg(not(any(stm32u5, stm32wba)))]
+                #[cfg(not(any(stm32u5, stm32wba, stm32n6)))]
                 let r = RCC.cfgr();
                 #[cfg(any(stm32u5, stm32wba))]
                 let r = RCC.cfgr1();
+                #[cfg(any(stm32n6))]
+                let r = RCC.ccipr5();
 
                 r.modify(|w| {
                     w.$set_source(source);
-- 
cgit