From e86c2b3b1c41c710acd34f6c85243c8bd5b5150d Mon Sep 17 00:00:00 2001 From: Gordon Tyler Date: Mon, 27 Oct 2025 10:41:33 -0400 Subject: mspm0: group irq handlers must check for NO_INTR (#4785) In the case of spurious interrupts, the interrupt group's STAT register may be set to NO_INTR, which must be checked before attempting to calculate the interrupt index from the STAT value. --- embassy-mspm0/build.rs | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/embassy-mspm0/build.rs b/embassy-mspm0/build.rs index 1d118ad66..6264c9177 100644 --- a/embassy-mspm0/build.rs +++ b/embassy-mspm0/build.rs @@ -194,8 +194,15 @@ fn generate_groups() -> TokenStream { use crate::pac::#group_enum; let group = crate::pac::CPUSS.int_group(#group_number); - // MUST subtract by 1 since 0 is NO_INTR - let iidx = group.iidx().read().stat().to_bits() - 1; + let stat = group.iidx().read().stat(); + + // check for spurious interrupts + if stat == crate::pac::cpuss::vals::Iidx::NO_INTR { + return; + } + + // MUST subtract by 1 because Iidx::INT0=1 + let iidx = stat.to_bits() - 1; let Ok(group) = #group_enum::try_from(iidx as u8) else { return; -- cgit From 3923f881c63a483c1593cc345079581ffcce5ff1 Mon Sep 17 00:00:00 2001 From: Gordon Tyler Date: Mon, 27 Oct 2025 10:45:47 -0400 Subject: Update changelog --- embassy-mspm0/CHANGELOG.md | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/embassy-mspm0/CHANGELOG.md b/embassy-mspm0/CHANGELOG.md index fcb0f9dbd..d9910a7ab 100644 --- a/embassy-mspm0/CHANGELOG.md +++ b/embassy-mspm0/CHANGELOG.md @@ -7,7 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 ## Unreleased - ReleaseDate - + - feat: Add I2C Controller (blocking & async) + examples for mspm0l1306, mspm0g3507 (tested MCUs) (#4435) - fix gpio interrupt not being set for mspm0l110x - feat: Add window watchdog implementation based on WWDT0, WWDT1 peripherals (#4574) @@ -17,3 +17,4 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 - fix: add MSPM0C1106 to build test matrix - feat: add MSPM0H3216 support - feat: Add i2c target implementation (#4605) +- fix: group irq handlers must check for NO_INTR (#4785) -- cgit From cf306ff60ed6361c78d8e7b19ee3fde8e9f060b9 Mon Sep 17 00:00:00 2001 From: Gordon Tyler Date: Wed, 29 Oct 2025 16:26:17 -0400 Subject: Improve comment about IIDX values being offset Co-authored-by: i509VCB --- embassy-mspm0/build.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-mspm0/build.rs b/embassy-mspm0/build.rs index 6264c9177..62b83c4e6 100644 --- a/embassy-mspm0/build.rs +++ b/embassy-mspm0/build.rs @@ -201,7 +201,7 @@ fn generate_groups() -> TokenStream { return; } - // MUST subtract by 1 because Iidx::INT0=1 + // MUST subtract by 1 because NO_INTR offsets IIDX values. let iidx = stat.to_bits() - 1; let Ok(group) = #group_enum::try_from(iidx as u8) else { -- cgit From cc2bb1c348b595c9bd17e0807f377d04406367dd Mon Sep 17 00:00:00 2001 From: xoviat Date: Wed, 29 Oct 2025 17:46:44 -0500 Subject: stm32/uart: fix rb uart race closes #4682 --- embassy-stm32/src/usart/ringbuffered.rs | 13 ++++--------- 1 file changed, 4 insertions(+), 9 deletions(-) diff --git a/embassy-stm32/src/usart/ringbuffered.rs b/embassy-stm32/src/usart/ringbuffered.rs index 20bfefd9e..710272e4e 100644 --- a/embassy-stm32/src/usart/ringbuffered.rs +++ b/embassy-stm32/src/usart/ringbuffered.rs @@ -7,7 +7,9 @@ use embassy_embedded_hal::SetConfig; use embedded_io_async::ReadReady; use futures_util::future::{Either, select}; -use super::{Config, ConfigError, Error, Info, State, UartRx, rdr, reconfigure, set_baudrate, sr}; +use super::{ + Config, ConfigError, Error, Info, State, UartRx, clear_interrupt_flags, rdr, reconfigure, set_baudrate, sr, +}; use crate::Peri; use crate::dma::ReadableRingBuffer; use crate::gpio::{AnyPin, SealedPin as _}; @@ -343,19 +345,12 @@ fn check_idle_and_errors(r: Regs) -> Result { // SAFETY: read only and we only use Rx related flags let sr = sr(r).read(); - #[cfg(any(usart_v3, usart_v4))] - r.icr().write(|w| { - w.set_idle(true); - w.set_pe(true); - w.set_fe(true); - w.set_ne(true); - w.set_ore(true); - }); #[cfg(not(any(usart_v3, usart_v4)))] unsafe { // This read also clears the error and idle interrupt flags on v1 (TODO and v2?) rdr(r).read_volatile() }; + clear_interrupt_flags(r, sr); sr }); if sr.pe() { -- cgit From 575eae0631dee2052569616521b6f3db6f969ac1 Mon Sep 17 00:00:00 2001 From: xoviat Date: Wed, 29 Oct 2025 17:49:14 -0500 Subject: stm32: usart changelog --- embassy-stm32/CHANGELOG.md | 1 + 1 file changed, 1 insertion(+) diff --git a/embassy-stm32/CHANGELOG.md b/embassy-stm32/CHANGELOG.md index 0c1c97665..99808c233 100644 --- a/embassy-stm32/CHANGELOG.md +++ b/embassy-stm32/CHANGELOG.md @@ -37,6 +37,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 - change: stm32/uart: BufferedUartRx now returns all available bytes from the internal buffer - change: timer: added output compare values - feat: timer: add ability to set master mode +- fix: usart: fix race condition in ringbuffered usart ## 0.4.0 - 2025-08-26 -- cgit From d8d25369678249be4dae7ba2738a7f0a5c3268f8 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Thu, 30 Oct 2025 13:52:22 +0100 Subject: executor: fix build with 'trace' on. --- embassy-executor/Cargo.toml | 2 ++ embassy-executor/src/raw/trace.rs | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/embassy-executor/Cargo.toml b/embassy-executor/Cargo.toml index ecc4b6338..e500833c0 100644 --- a/embassy-executor/Cargo.toml +++ b/embassy-executor/Cargo.toml @@ -30,6 +30,7 @@ build = [ {target = "thumbv7em-none-eabi", features = ["arch-cortex-m", "executor-interrupt", "executor-thread", "embassy-time-driver", "scheduler-deadline"]}, {target = "thumbv7em-none-eabi", features = ["arch-cortex-m", "executor-interrupt", "executor-thread", "scheduler-priority", "scheduler-deadline"]}, {target = "thumbv7em-none-eabi", features = ["arch-cortex-m", "executor-interrupt", "executor-thread", "scheduler-deadline"]}, + {target = "thumbv7em-none-eabi", features = ["arch-cortex-m", "executor-interrupt", "executor-thread", "embassy-time-driver", "scheduler-priority", "scheduler-deadline", "trace"]}, {target = "thumbv7em-none-eabi", features = ["arch-spin"]}, {target = "thumbv7em-none-eabi", features = ["arch-spin", "scheduler-deadline"]}, {target = "armv7a-none-eabi", features = ["arch-cortex-ar", "executor-thread"]}, @@ -37,6 +38,7 @@ build = [ {target = "armv7r-none-eabihf", features = ["arch-cortex-ar", "executor-thread"]}, {target = "riscv32imac-unknown-none-elf", features = ["arch-riscv32"]}, {target = "riscv32imac-unknown-none-elf", features = ["arch-riscv32", "executor-thread"]}, + {target = "riscv32imac-unknown-none-elf", features = ["arch-riscv32", "executor-thread", "trace"]}, # Nightly builds {group = "nightly", target = "thumbv7em-none-eabi", features = ["nightly"]}, {group = "nightly", target = "thumbv7em-none-eabi", features = ["nightly", "log"]}, diff --git a/embassy-executor/src/raw/trace.rs b/embassy-executor/src/raw/trace.rs index 74519b927..830162039 100644 --- a/embassy-executor/src/raw/trace.rs +++ b/embassy-executor/src/raw/trace.rs @@ -169,7 +169,7 @@ impl TaskTracker { } #[cfg(feature = "trace")] -extern "Rust" { +unsafe extern "Rust" { /// This callback is called when the executor begins polling. This will always /// be paired with a later call to `_embassy_trace_executor_idle`. /// -- cgit From 102cceb30ec0af85f0fee66ae9e4cba049b5fffd Mon Sep 17 00:00:00 2001 From: Gordon Tyler Date: Thu, 30 Oct 2025 14:08:06 -0400 Subject: Fix rustfmt error --- embassy-mspm0/build.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-mspm0/build.rs b/embassy-mspm0/build.rs index 62b83c4e6..4942364aa 100644 --- a/embassy-mspm0/build.rs +++ b/embassy-mspm0/build.rs @@ -201,7 +201,7 @@ fn generate_groups() -> TokenStream { return; } - // MUST subtract by 1 because NO_INTR offsets IIDX values. + // MUST subtract by 1 because NO_INTR offsets IIDX values. let iidx = stat.to_bits() - 1; let Ok(group) = #group_enum::try_from(iidx as u8) else { -- cgit From ac6e75c8887a6d2362cc00dbf246017d2cd1e102 Mon Sep 17 00:00:00 2001 From: xoviat Date: Thu, 30 Oct 2025 21:18:04 -0500 Subject: remove cs --- embassy-stm32/src/usart/ringbuffered.rs | 23 ++++++++++------------- 1 file changed, 10 insertions(+), 13 deletions(-) diff --git a/embassy-stm32/src/usart/ringbuffered.rs b/embassy-stm32/src/usart/ringbuffered.rs index 710272e4e..bac570d27 100644 --- a/embassy-stm32/src/usart/ringbuffered.rs +++ b/embassy-stm32/src/usart/ringbuffered.rs @@ -340,19 +340,16 @@ impl Drop for RingBufferedUartRx<'_> { /// For usart_v1 and usart_v2, all status flags must be handled together anyway because all flags /// are cleared by a single read to the RDR register. fn check_idle_and_errors(r: Regs) -> Result { - // Critical section is required so that the flags aren't set after read and before clear - let sr = critical_section::with(|_| { - // SAFETY: read only and we only use Rx related flags - let sr = sr(r).read(); - - #[cfg(not(any(usart_v3, usart_v4)))] - unsafe { - // This read also clears the error and idle interrupt flags on v1 (TODO and v2?) - rdr(r).read_volatile() - }; - clear_interrupt_flags(r, sr); - sr - }); + // SAFETY: read only and we only use Rx related flags + let sr = sr(r).read(); + + #[cfg(not(any(usart_v3, usart_v4)))] + unsafe { + // This read also clears the error and idle interrupt flags on v1 (TODO and v2?) + rdr(r).read_volatile() + }; + clear_interrupt_flags(r, sr); + if sr.pe() { Err(Error::Parity) } else if sr.fe() { -- cgit