From 5bef2eab2352113c2ab9a97be72d72d6df46045d Mon Sep 17 00:00:00 2001 From: i509VCB Date: Sat, 13 Dec 2025 21:23:22 -0600 Subject: mspm0: add MSPM0G518x support and new packages for others G518x is the first MSPM0 part with a USB, I2S and NPU peripheral. There is also a new TIMB peripheral (no PWM, so it is perfect for a time driver). Unfortunately it also introduces UNICOMM which is a shared peripheral which can be in UART/I2C/SPI modes. This means that the current UART and I2C drivers need some adjustment to work with the new UNICOMM parts (which is the future). --- embassy-mspm0/CHANGELOG.md | 3 +- embassy-mspm0/Cargo.toml | 145 +++++++++++++++++++++++---------------- embassy-mspm0/build.rs | 52 +++++++++++--- embassy-mspm0/src/gpio.rs | 4 ++ embassy-mspm0/src/i2c_target.rs | 9 +-- embassy-mspm0/src/lib.rs | 16 +++-- embassy-mspm0/src/macros.rs | 1 + embassy-mspm0/src/time_driver.rs | 4 ++ 8 files changed, 155 insertions(+), 79 deletions(-) (limited to 'embassy-mspm0') diff --git a/embassy-mspm0/CHANGELOG.md b/embassy-mspm0/CHANGELOG.md index 6972a8472..19275f35a 100644 --- a/embassy-mspm0/CHANGELOG.md +++ b/embassy-mspm0/CHANGELOG.md @@ -19,4 +19,5 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 - feat: Add i2c target implementation (#4605) - fix: group irq handlers must check for NO_INTR (#4785) - feat: Add read_reset_cause function -- feat: Add module Mathacl & example for mspm0g3507 (#4897) \ No newline at end of file +- feat: Add module Mathacl & example for mspm0g3507 (#4897) +- feat: Add MSPM0G5187 supportt diff --git a/embassy-mspm0/Cargo.toml b/embassy-mspm0/Cargo.toml index 254e0209b..cf2346328 100644 --- a/embassy-mspm0/Cargo.toml +++ b/embassy-mspm0/Cargo.toml @@ -73,7 +73,7 @@ critical-section = "1.2.0" micromath = "2.0.0" # mspm0-metapac = { version = "" } -mspm0-metapac = { git = "https://github.com/mspm0-rs/mspm0-data-generated/", tag = "mspm0-data-f21b04e9de074af4965bf67ec3646cb9fe1b9852" } +mspm0-metapac = { git = "https://github.com/mspm0-rs/mspm0-data-generated/", tag = "mspm0-data-e91edd86813aa94cbb6737d34e4f1d22b8487cb6" } [build-dependencies] proc-macro2 = "1.0.94" @@ -81,7 +81,7 @@ quote = "1.0.40" cfg_aliases = "0.2.1" # mspm0-metapac = { version = "", default-features = false, features = ["metadata"] } -mspm0-metapac = { git = "https://github.com/mspm0-rs/mspm0-data-generated/", tag = "mspm0-data-f21b04e9de074af4965bf67ec3646cb9fe1b9852", default-features = false, features = ["metadata"] } +mspm0-metapac = { git = "https://github.com/mspm0-rs/mspm0-data-generated/", tag = "mspm0-data-e91edd86813aa94cbb6737d34e4f1d22b8487cb6", default-features = false, features = ["metadata"] } [features] default = ["rt"] @@ -153,15 +153,14 @@ time-driver-tima1 = ["_time-driver"] #! #! **Important:** Do not forget to adapt the target chip in your toolchain, #! e.g. in `.cargo/config.toml`. - mspm0c1103dgs20 = ["mspm0-metapac/mspm0c1103dgs20"] -mspm0c1103dsg = ["mspm0-metapac/mspm0c1103dsg"] -mspm0c1103dyy = ["mspm0-metapac/mspm0c1103dyy"] mspm0c1103ruk = ["mspm0-metapac/mspm0c1103ruk"] +mspm0c1103dyy = ["mspm0-metapac/mspm0c1103dyy"] +mspm0c1103dsg = ["mspm0-metapac/mspm0c1103dsg"] mspm0c1104dgs20 = ["mspm0-metapac/mspm0c1104dgs20"] -mspm0c1104dsg = ["mspm0-metapac/mspm0c1104dsg"] -mspm0c1104dyy = ["mspm0-metapac/mspm0c1104dyy"] mspm0c1104ruk = ["mspm0-metapac/mspm0c1104ruk"] +mspm0c1104dyy = ["mspm0-metapac/mspm0c1104dyy"] +mspm0c1104dsg = ["mspm0-metapac/mspm0c1104dsg"] mspm0c1104ycj = ["mspm0-metapac/mspm0c1104ycj"] mspm0c1105pt = ["mspm0-metapac/mspm0c1105pt"] mspm0c1105rgz = ["mspm0-metapac/mspm0c1105rgz"] @@ -181,43 +180,54 @@ mspm0c1106rge = ["mspm0-metapac/mspm0c1106rge"] mspm0c1106dgs20 = ["mspm0-metapac/mspm0c1106dgs20"] mspm0c1106ruk = ["mspm0-metapac/mspm0c1106ruk"] mspm0c1106zcm = ["mspm0-metapac/mspm0c1106zcm"] -mspm0g1105dgs28 = ["mspm0-metapac/mspm0g1105dgs28"] -mspm0g1105pm = ["mspm0-metapac/mspm0g1105pm"] -mspm0g1105pt = ["mspm0-metapac/mspm0g1105pt"] mspm0g1105rge = ["mspm0-metapac/mspm0g1105rge"] -mspm0g1105rgz = ["mspm0-metapac/mspm0g1105rgz"] +mspm0g1105dgs28 = ["mspm0-metapac/mspm0g1105dgs28"] mspm0g1105rhb = ["mspm0-metapac/mspm0g1105rhb"] -mspm0g1106dgs28 = ["mspm0-metapac/mspm0g1106dgs28"] -mspm0g1106pm = ["mspm0-metapac/mspm0g1106pm"] -mspm0g1106pt = ["mspm0-metapac/mspm0g1106pt"] +mspm0g1105rgz = ["mspm0-metapac/mspm0g1105rgz"] +mspm0g1105pt = ["mspm0-metapac/mspm0g1105pt"] +mspm0g1105pm = ["mspm0-metapac/mspm0g1105pm"] mspm0g1106rge = ["mspm0-metapac/mspm0g1106rge"] -mspm0g1106rgz = ["mspm0-metapac/mspm0g1106rgz"] +mspm0g1106dgs28 = ["mspm0-metapac/mspm0g1106dgs28"] mspm0g1106rhb = ["mspm0-metapac/mspm0g1106rhb"] -mspm0g1107dgs28 = ["mspm0-metapac/mspm0g1107dgs28"] -mspm0g1107pm = ["mspm0-metapac/mspm0g1107pm"] -mspm0g1107pt = ["mspm0-metapac/mspm0g1107pt"] +mspm0g1106rgz = ["mspm0-metapac/mspm0g1106rgz"] +mspm0g1106pt = ["mspm0-metapac/mspm0g1106pt"] +mspm0g1106pm = ["mspm0-metapac/mspm0g1106pm"] mspm0g1107rge = ["mspm0-metapac/mspm0g1107rge"] -mspm0g1107rgz = ["mspm0-metapac/mspm0g1107rgz"] +mspm0g1107dgs28 = ["mspm0-metapac/mspm0g1107dgs28"] mspm0g1107rhb = ["mspm0-metapac/mspm0g1107rhb"] +mspm0g1107rgz = ["mspm0-metapac/mspm0g1107rgz"] +mspm0g1107pt = ["mspm0-metapac/mspm0g1107pt"] +mspm0g1107pm = ["mspm0-metapac/mspm0g1107pm"] mspm0g1107ycj = ["mspm0-metapac/mspm0g1107ycj"] -mspm0g1505pm = ["mspm0-metapac/mspm0g1505pm"] -mspm0g1505pt = ["mspm0-metapac/mspm0g1505pt"] mspm0g1505rge = ["mspm0-metapac/mspm0g1505rge"] -mspm0g1505rgz = ["mspm0-metapac/mspm0g1505rgz"] mspm0g1505rhb = ["mspm0-metapac/mspm0g1505rhb"] -mspm0g1506pm = ["mspm0-metapac/mspm0g1506pm"] -mspm0g1506pt = ["mspm0-metapac/mspm0g1506pt"] +mspm0g1505rgz = ["mspm0-metapac/mspm0g1505rgz"] +mspm0g1505pt = ["mspm0-metapac/mspm0g1505pt"] +mspm0g1505pm = ["mspm0-metapac/mspm0g1505pm"] mspm0g1506rge = ["mspm0-metapac/mspm0g1506rge"] -mspm0g1506rgz = ["mspm0-metapac/mspm0g1506rgz"] mspm0g1506rhb = ["mspm0-metapac/mspm0g1506rhb"] -mspm0g1507pm = ["mspm0-metapac/mspm0g1507pm"] -mspm0g1507pt = ["mspm0-metapac/mspm0g1507pt"] +mspm0g1506rgz = ["mspm0-metapac/mspm0g1506rgz"] +mspm0g1506pt = ["mspm0-metapac/mspm0g1506pt"] +mspm0g1506pm = ["mspm0-metapac/mspm0g1506pm"] mspm0g1507rge = ["mspm0-metapac/mspm0g1507rge"] -mspm0g1507rgz = ["mspm0-metapac/mspm0g1507rgz"] mspm0g1507rhb = ["mspm0-metapac/mspm0g1507rhb"] +mspm0g1507rgz = ["mspm0-metapac/mspm0g1507rgz"] +mspm0g1507pt = ["mspm0-metapac/mspm0g1507pt"] +mspm0g1507pm = ["mspm0-metapac/mspm0g1507pm"] mspm0g1507ycj = ["mspm0-metapac/mspm0g1507ycj"] -mspm0g1519rgz = ["mspm0-metapac/mspm0g1519rgz"] +mspm0g1518rhb = ["mspm0-metapac/mspm0g1518rhb"] +mspm0g1518rgz = ["mspm0-metapac/mspm0g1518rgz"] +mspm0g1518pt = ["mspm0-metapac/mspm0g1518pt"] +mspm0g1518pm = ["mspm0-metapac/mspm0g1518pm"] +mspm0g1518pz = ["mspm0-metapac/mspm0g1518pz"] +mspm0g1518pn = ["mspm0-metapac/mspm0g1518pn"] +mspm0g1518zaw = ["mspm0-metapac/mspm0g1518zaw"] mspm0g1519rhb = ["mspm0-metapac/mspm0g1519rhb"] +mspm0g1519rgz = ["mspm0-metapac/mspm0g1519rgz"] +mspm0g1519pt = ["mspm0-metapac/mspm0g1519pt"] +mspm0g1519pm = ["mspm0-metapac/mspm0g1519pm"] +mspm0g1519pz = ["mspm0-metapac/mspm0g1519pz"] +mspm0g1519pn = ["mspm0-metapac/mspm0g1519pn"] mspm0g3105dgs20 = ["mspm0-metapac/mspm0g3105dgs20"] mspm0g3105dgs28 = ["mspm0-metapac/mspm0g3105dgs28"] mspm0g3105rhb = ["mspm0-metapac/mspm0g3105rhb"] @@ -228,77 +238,92 @@ mspm0g3107dgs20 = ["mspm0-metapac/mspm0g3107dgs20"] mspm0g3107dgs28 = ["mspm0-metapac/mspm0g3107dgs28"] mspm0g3107rhb = ["mspm0-metapac/mspm0g3107rhb"] mspm0g3505dgs28 = ["mspm0-metapac/mspm0g3505dgs28"] -mspm0g3505pm = ["mspm0-metapac/mspm0g3505pm"] -mspm0g3505pt = ["mspm0-metapac/mspm0g3505pt"] -mspm0g3505rgz = ["mspm0-metapac/mspm0g3505rgz"] mspm0g3505rhb = ["mspm0-metapac/mspm0g3505rhb"] +mspm0g3505rgz = ["mspm0-metapac/mspm0g3505rgz"] +mspm0g3505pt = ["mspm0-metapac/mspm0g3505pt"] +mspm0g3505pm = ["mspm0-metapac/mspm0g3505pm"] mspm0g3506dgs28 = ["mspm0-metapac/mspm0g3506dgs28"] -mspm0g3506pm = ["mspm0-metapac/mspm0g3506pm"] -mspm0g3506pt = ["mspm0-metapac/mspm0g3506pt"] -mspm0g3506rgz = ["mspm0-metapac/mspm0g3506rgz"] mspm0g3506rhb = ["mspm0-metapac/mspm0g3506rhb"] +mspm0g3506rgz = ["mspm0-metapac/mspm0g3506rgz"] +mspm0g3506pt = ["mspm0-metapac/mspm0g3506pt"] +mspm0g3506pm = ["mspm0-metapac/mspm0g3506pm"] mspm0g3507dgs28 = ["mspm0-metapac/mspm0g3507dgs28"] -mspm0g3507pm = ["mspm0-metapac/mspm0g3507pm"] -mspm0g3507pt = ["mspm0-metapac/mspm0g3507pt"] -mspm0g3507rgz = ["mspm0-metapac/mspm0g3507rgz"] mspm0g3507rhb = ["mspm0-metapac/mspm0g3507rhb"] +mspm0g3507rgz = ["mspm0-metapac/mspm0g3507rgz"] +mspm0g3507pt = ["mspm0-metapac/mspm0g3507pt"] +mspm0g3507pm = ["mspm0-metapac/mspm0g3507pm"] +mspm0g3518rhb = ["mspm0-metapac/mspm0g3518rhb"] +mspm0g3518rgz = ["mspm0-metapac/mspm0g3518rgz"] +mspm0g3518pt = ["mspm0-metapac/mspm0g3518pt"] +mspm0g3518pm = ["mspm0-metapac/mspm0g3518pm"] +mspm0g3518pz = ["mspm0-metapac/mspm0g3518pz"] +mspm0g3518pn = ["mspm0-metapac/mspm0g3518pn"] +mspm0g3519rhb = ["mspm0-metapac/mspm0g3519rhb"] +mspm0g3519rgz = ["mspm0-metapac/mspm0g3519rgz"] +mspm0g3519pt = ["mspm0-metapac/mspm0g3519pt"] mspm0g3519pm = ["mspm0-metapac/mspm0g3519pm"] -mspm0g3519pn = ["mspm0-metapac/mspm0g3519pn"] mspm0g3519pz = ["mspm0-metapac/mspm0g3519pz"] -mspm0g3519rgz = ["mspm0-metapac/mspm0g3519rgz"] -mspm0g3519rhb = ["mspm0-metapac/mspm0g3519rhb"] +mspm0g3519pn = ["mspm0-metapac/mspm0g3519pn"] +mspm0g3519zaw = ["mspm0-metapac/mspm0g3519zaw"] +mspm0g5187rhb = ["mspm0-metapac/mspm0g5187rhb"] +mspm0g5187rgz = ["mspm0-metapac/mspm0g5187rgz"] +mspm0g5187pt = ["mspm0-metapac/mspm0g5187pt"] +mspm0g5187pm = ["mspm0-metapac/mspm0g5187pm"] +mspm0g5187ruy = ["mspm0-metapac/mspm0g5187ruy"] +mspm0g5187ycj = ["mspm0-metapac/mspm0g5187ycj"] +mspm0g5187rge = ["mspm0-metapac/mspm0g5187rge"] mspm0h3216pt = ["mspm0-metapac/mspm0h3216pt"] mspm0l1105dgs20 = ["mspm0-metapac/mspm0l1105dgs20"] mspm0l1105dgs28 = ["mspm0-metapac/mspm0l1105dgs28"] -mspm0l1105dyy = ["mspm0-metapac/mspm0l1105dyy"] mspm0l1105rge = ["mspm0-metapac/mspm0l1105rge"] mspm0l1105rtr = ["mspm0-metapac/mspm0l1105rtr"] +mspm0l1105dyy = ["mspm0-metapac/mspm0l1105dyy"] +mspm0l1106rhb = ["mspm0-metapac/mspm0l1106rhb"] mspm0l1106dgs20 = ["mspm0-metapac/mspm0l1106dgs20"] mspm0l1106dgs28 = ["mspm0-metapac/mspm0l1106dgs28"] -mspm0l1106dyy = ["mspm0-metapac/mspm0l1106dyy"] mspm0l1106rge = ["mspm0-metapac/mspm0l1106rge"] -mspm0l1106rhb = ["mspm0-metapac/mspm0l1106rhb"] mspm0l1106rtr = ["mspm0-metapac/mspm0l1106rtr"] -mspm0l1227pm = ["mspm0-metapac/mspm0l1227pm"] +mspm0l1106dyy = ["mspm0-metapac/mspm0l1106dyy"] +mspm0l1227rhb = ["mspm0-metapac/mspm0l1227rhb"] mspm0l1227pn = ["mspm0-metapac/mspm0l1227pn"] +mspm0l1227rgz = ["mspm0-metapac/mspm0l1227rgz"] mspm0l1227pt = ["mspm0-metapac/mspm0l1227pt"] +mspm0l1227pm = ["mspm0-metapac/mspm0l1227pm"] mspm0l1227rge = ["mspm0-metapac/mspm0l1227rge"] -mspm0l1227rgz = ["mspm0-metapac/mspm0l1227rgz"] -mspm0l1227rhb = ["mspm0-metapac/mspm0l1227rhb"] -mspm0l1228pm = ["mspm0-metapac/mspm0l1228pm"] +mspm0l1228rhb = ["mspm0-metapac/mspm0l1228rhb"] mspm0l1228pn = ["mspm0-metapac/mspm0l1228pn"] +mspm0l1228rgz = ["mspm0-metapac/mspm0l1228rgz"] mspm0l1228pt = ["mspm0-metapac/mspm0l1228pt"] +mspm0l1228pm = ["mspm0-metapac/mspm0l1228pm"] mspm0l1228rge = ["mspm0-metapac/mspm0l1228rge"] -mspm0l1228rgz = ["mspm0-metapac/mspm0l1228rgz"] -mspm0l1228rhb = ["mspm0-metapac/mspm0l1228rhb"] mspm0l1303rge = ["mspm0-metapac/mspm0l1303rge"] +mspm0l1304rhb = ["mspm0-metapac/mspm0l1304rhb"] mspm0l1304dgs20 = ["mspm0-metapac/mspm0l1304dgs20"] mspm0l1304dgs28 = ["mspm0-metapac/mspm0l1304dgs28"] -mspm0l1304dyy = ["mspm0-metapac/mspm0l1304dyy"] mspm0l1304rge = ["mspm0-metapac/mspm0l1304rge"] -mspm0l1304rhb = ["mspm0-metapac/mspm0l1304rhb"] mspm0l1304rtr = ["mspm0-metapac/mspm0l1304rtr"] +mspm0l1304dyy = ["mspm0-metapac/mspm0l1304dyy"] mspm0l1305dgs20 = ["mspm0-metapac/mspm0l1305dgs20"] mspm0l1305dgs28 = ["mspm0-metapac/mspm0l1305dgs28"] -mspm0l1305dyy = ["mspm0-metapac/mspm0l1305dyy"] mspm0l1305rge = ["mspm0-metapac/mspm0l1305rge"] mspm0l1305rtr = ["mspm0-metapac/mspm0l1305rtr"] +mspm0l1305dyy = ["mspm0-metapac/mspm0l1305dyy"] +mspm0l1306rhb = ["mspm0-metapac/mspm0l1306rhb"] mspm0l1306dgs20 = ["mspm0-metapac/mspm0l1306dgs20"] mspm0l1306dgs28 = ["mspm0-metapac/mspm0l1306dgs28"] -mspm0l1306dyy = ["mspm0-metapac/mspm0l1306dyy"] mspm0l1306rge = ["mspm0-metapac/mspm0l1306rge"] -mspm0l1306rhb = ["mspm0-metapac/mspm0l1306rhb"] +mspm0l1306dyy = ["mspm0-metapac/mspm0l1306dyy"] mspm0l1343dgs20 = ["mspm0-metapac/mspm0l1343dgs20"] mspm0l1344dgs20 = ["mspm0-metapac/mspm0l1344dgs20"] mspm0l1345dgs28 = ["mspm0-metapac/mspm0l1345dgs28"] mspm0l1346dgs28 = ["mspm0-metapac/mspm0l1346dgs28"] +mspm0l2227rgz = ["mspm0-metapac/mspm0l2227rgz"] +mspm0l2227pt = ["mspm0-metapac/mspm0l2227pt"] mspm0l2227pm = ["mspm0-metapac/mspm0l2227pm"] mspm0l2227pn = ["mspm0-metapac/mspm0l2227pn"] -mspm0l2227pt = ["mspm0-metapac/mspm0l2227pt"] -mspm0l2227rgz = ["mspm0-metapac/mspm0l2227rgz"] +mspm0l2228rgz = ["mspm0-metapac/mspm0l2228rgz"] +mspm0l2228pt = ["mspm0-metapac/mspm0l2228pt"] mspm0l2228pm = ["mspm0-metapac/mspm0l2228pm"] mspm0l2228pn = ["mspm0-metapac/mspm0l2228pn"] -mspm0l2228pt = ["mspm0-metapac/mspm0l2228pt"] -mspm0l2228rgz = ["mspm0-metapac/mspm0l2228rgz"] msps003f3pw20 = ["mspm0-metapac/msps003f3pw20"] -msps003f4pw20 = ["mspm0-metapac/msps003f4pw20"] +msps003f4pw20 = ["mspm0-metapac/msps003f4pw20"] \ No newline at end of file diff --git a/embassy-mspm0/build.rs b/embassy-mspm0/build.rs index 0fe056c4e..ac40adbdf 100644 --- a/embassy-mspm0/build.rs +++ b/embassy-mspm0/build.rs @@ -31,7 +31,7 @@ fn generate_code(cfgs: &mut CfgSet) { PathBuf::from(env::var_os("OUT_DIR").unwrap()).display(), ); - cfgs.declare_all(&["gpio_pb", "gpio_pc", "int_group1"]); + cfgs.declare_all(&["gpio_pb", "gpio_pc", "int_group1", "unicomm"]); let chip_name = match env::vars() .map(|(a, _)| a) @@ -116,6 +116,10 @@ fn get_chip_cfgs(chip_name: &str) -> Vec { cfgs.push("mspm0g351x".to_string()); } + if chip_name.starts_with("mspm0g518") { + cfgs.push("mspm0g518x".to_string()); + } + if chip_name.starts_with("mspm0h321") { cfgs.push("mspm0h321x".to_string()); } @@ -300,6 +304,15 @@ fn get_singletons(cfgs: &mut common::CfgSet) -> Vec { // by the HAL. "iomux" | "cpuss" => true, + // Unicomm instances get their own singletons, but we need to enable a cfg for unicomm drivers. + "unicomm" => { + cfgs.enable("unicomm"); + false + } + + // TODO: Remove after TIMB is fixed + "tim" if peripheral.name.starts_with("TIMB") => true, + _ => false, }; @@ -423,6 +436,8 @@ fn time_driver(singletons: &mut Vec, cfgs: &mut CfgSet) { // Verify the selected timer is available let selected_timer = match time_driver.as_ref().map(|x| x.as_ref()) { None => "", + // TODO: Fix TIMB0 + // Some("timb0") => "TIMB0", Some("timg0") => "TIMG0", Some("timg1") => "TIMG1", Some("timg2") => "TIMG2", @@ -440,16 +455,17 @@ fn time_driver(singletons: &mut Vec, cfgs: &mut CfgSet) { Some("tima1") => "TIMA1", Some("any") => { // Order of timer candidates: - // 1. 16-bit, 2 channel - // 2. 16-bit, 2 channel with shadow registers - // 3. 16-bit, 4 channel - // 4. 16-bit with QEI - // 5. Advanced timers + // 1. Basic timers + // 2. 16-bit, 2 channel + // 3. 16-bit, 2 channel with shadow registers + // 4. 16-bit, 4 channel + // 5. 16-bit with QEI + // 6. Advanced timers // - // TODO: Select RTC first if available // TODO: 32-bit timers are not considered yet [ - // 16-bit, 2 channel + // basic timers. No PWM pins + // "TIMB0", // 16-bit, 2 channel "TIMG0", "TIMG1", "TIMG2", "TIMG3", // 16-bit, 2 channel with shadow registers "TIMG4", "TIMG5", "TIMG6", "TIMG7", // 16-bit, 4 channel "TIMG14", // 16-bit with QEI @@ -519,6 +535,8 @@ fn generate_timers() -> TokenStream { .peripherals .iter() .filter(|p| p.name.starts_with("TIM")) + // TODO: Fix TIMB when used at time driver. + .filter(|p| !p.name.starts_with("TIMB")) .map(|peripheral| { let name = Ident::new(&peripheral.name, Span::call_site()); let timers = &*TIMERS; @@ -729,6 +747,24 @@ struct TimerDesc { /// Description of all timer instances. const TIMERS: LazyLock> = LazyLock::new(|| { let mut map = HashMap::new(); + map.insert( + "TIMB0".into(), + TimerDesc { + bits: 16, + prescaler: true, + repeat_counter: false, + ccp_channels_internal: 2, + ccp_channels_external: 2, + external_pwm_channels: 0, + phase_load: false, + shadow_load: false, + shadow_ccs: false, + deadband: false, + fault_handler: false, + qei_hall: false, + }, + ); + map.insert( "TIMG0".into(), TimerDesc { diff --git a/embassy-mspm0/src/gpio.rs b/embassy-mspm0/src/gpio.rs index d8eb42dc2..709102c59 100644 --- a/embassy-mspm0/src/gpio.rs +++ b/embassy-mspm0/src/gpio.rs @@ -841,6 +841,7 @@ impl<'d> embedded_hal_async::digital::Wait for OutputOpenDrain<'d> { } } +#[cfg_attr(mspm0g518x, allow(dead_code))] #[derive(Copy, Clone)] pub struct PfType { pull: Pull, @@ -948,6 +949,7 @@ pub(crate) trait SealedPin { }); } + #[cfg_attr(mspm0g518x, allow(dead_code))] fn update_pf(&self, ty: PfType) { let pincm = pac::IOMUX.pincm(self._pin_cm() as usize); let pf = pincm.read().pf(); @@ -955,6 +957,7 @@ pub(crate) trait SealedPin { set_pf(self._pin_cm() as usize, pf, ty); } + #[cfg_attr(mspm0g518x, allow(dead_code))] fn set_as_pf(&self, pf: u8, ty: PfType) { set_pf(self._pin_cm() as usize, pf, ty) } @@ -967,6 +970,7 @@ pub(crate) trait SealedPin { /// /// Note that this also disables the internal weak pull-up and pull-down resistors. #[inline] + #[cfg_attr(mspm0g518x, allow(dead_code))] fn set_as_disconnected(&self) { self.set_as_analog(); } diff --git a/embassy-mspm0/src/i2c_target.rs b/embassy-mspm0/src/i2c_target.rs index 86be91415..e371fa903 100644 --- a/embassy-mspm0/src/i2c_target.rs +++ b/embassy-mspm0/src/i2c_target.rs @@ -12,12 +12,13 @@ use embassy_embedded_hal::SetConfig; use mspm0_metapac::i2c::vals::CpuIntIidxStat; use crate::gpio::{AnyPin, SealedPin}; -use crate::interrupt::InterruptExt; -use crate::mode::{Async, Blocking, Mode}; -use crate::pac::{self, i2c::vals}; -use crate::{i2c, i2c_target, interrupt, Peri}; // Re-use I2c controller types use crate::i2c::{ClockSel, ConfigError, Info, Instance, InterruptHandler, SclPin, SdaPin, State}; +use crate::interrupt::InterruptExt; +use crate::mode::{Async, Blocking, Mode}; +use crate::pac::i2c::vals; +use crate::pac::{self}; +use crate::{Peri, i2c, i2c_target, interrupt}; #[non_exhaustive] #[derive(Clone, Copy, PartialEq, Eq, Debug)] diff --git a/embassy-mspm0/src/lib.rs b/embassy-mspm0/src/lib.rs index c43c81853..548fb33ca 100644 --- a/embassy-mspm0/src/lib.rs +++ b/embassy-mspm0/src/lib.rs @@ -8,20 +8,23 @@ )] #![doc = include_str!("../README.md")] -// This mod MUST go first, so that the others see its macros. +// These mods MUST go first, so that the others see the macros. pub(crate) mod fmt; - -// This must be declared early as well for mod macros; pub mod adc; pub mod dma; pub mod gpio; +// TODO: I2C unicomm +#[cfg(not(unicomm))] pub mod i2c; +#[cfg(not(unicomm))] pub mod i2c_target; #[cfg(any(mspm0g150x, mspm0g151x, mspm0g350x, mspm0g351x))] pub mod mathacl; pub mod timer; +// TODO: UART unicomm +#[cfg(not(unicomm))] pub mod uart; pub mod wwdt; @@ -276,7 +279,7 @@ pub enum ResetCause { /// WWDT0 violation BootrstWwdt0Violation, /// WWDT1 violation (G-series only) - #[cfg(any(mspm0g110x, mspm0g150x, mspm0g151x, mspm0g310x, mspm0g350x, mspm0g351x))] + #[cfg(any(mspm0g110x, mspm0g150x, mspm0g151x, mspm0g310x, mspm0g350x, mspm0g351x, mspm0g518x))] SysrstWwdt1Violation, /// BSL exit (if present) SysrstBslExit, @@ -326,7 +329,8 @@ pub fn read_reset_cause() -> Result { mspm0g151x, mspm0g310x, mspm0g350x, - mspm0g351x + mspm0g351x, + mspm0g518x, )))] Id::BOOTNONPMUPARITY => Ok(BootrstNonPmuParityFault), Id::BOOTCLKFAIL => Ok(BootrstClockFault), @@ -335,7 +339,7 @@ pub fn read_reset_cause() -> Result { Id::BOOTWWDT0 => Ok(BootrstWwdt0Violation), Id::SYSBSLEXIT => Ok(SysrstBslExit), Id::SYSBSLENTRY => Ok(SysrstBslEntry), - #[cfg(any(mspm0g110x, mspm0g150x, mspm0g151x, mspm0g310x, mspm0g350x, mspm0g351x))] + #[cfg(any(mspm0g110x, mspm0g150x, mspm0g151x, mspm0g310x, mspm0g350x, mspm0g351x, mspm0g518x))] Id::SYSWWDT1 => Ok(SysrstWwdt1Violation), #[cfg(not(any(mspm0c110x, mspm0c1105_c1106, mspm0g351x, mspm0g151x)))] Id::SYSFLASHECC => Ok(SysrstFlashEccError), diff --git a/embassy-mspm0/src/macros.rs b/embassy-mspm0/src/macros.rs index 5355e7d59..3a12a528a 100644 --- a/embassy-mspm0/src/macros.rs +++ b/embassy-mspm0/src/macros.rs @@ -1,5 +1,6 @@ #![macro_use] +#[allow(unused)] macro_rules! new_pin { ($name: ident, $pf_type: expr) => {{ let pin = $name; diff --git a/embassy-mspm0/src/time_driver.rs b/embassy-mspm0/src/time_driver.rs index 0743c667b..b42ff61c2 100644 --- a/embassy-mspm0/src/time_driver.rs +++ b/embassy-mspm0/src/time_driver.rs @@ -16,6 +16,8 @@ use crate::timer::SealedTimer; compile_error!("TIMG12 and TIMG13 are not supported by the time driver yet"); // Currently TIMG12 and TIMG13 are excluded because those are 32-bit timers. +#[cfg(time_driver_timb0)] +type T = peripherals::TIMB0; #[cfg(time_driver_timg0)] type T = peripherals::TIMG0; #[cfg(time_driver_timg1)] @@ -333,6 +335,8 @@ pub(crate) fn init(cs: CriticalSection) { DRIVER.init(cs); } +// TODO: TIMB0 + #[cfg(time_driver_timg0)] #[interrupt] fn TIMG0() { -- cgit