From f236bb49301e3e726d60e0af8f6b998083b6215e Mon Sep 17 00:00:00 2001
From: Siarhei B <dkc.sergey.dema@gmail.com>
Date: Sun, 16 Nov 2025 01:29:53 +0100
Subject: mspm0: apply formatting for new Mathacl & example

---
 embassy-mspm0/src/mathacl.rs | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

(limited to 'embassy-mspm0')

diff --git a/embassy-mspm0/src/mathacl.rs b/embassy-mspm0/src/mathacl.rs
index 59687ce49..1b1c67a71 100644
--- a/embassy-mspm0/src/mathacl.rs
+++ b/embassy-mspm0/src/mathacl.rs
@@ -5,10 +5,10 @@
 #![macro_use]
 
 use embassy_hal_internal::PeripheralType;
+use micromath::F32Ext;
 
 use crate::Peri;
 use crate::pac::mathacl::{Mathacl as Regs, vals};
-use micromath::F32Ext;
 
 pub enum Precision {
     High = 31,
@@ -64,7 +64,9 @@ impl Mathacl {
         }
 
         match signed_f32_to_register(angle, 0) {
-            Ok(val) => self.regs.op1().write(|w| {w.set_data(val);}),
+            Ok(val) => self.regs.op1().write(|w| {
+                w.set_data(val);
+            }),
             Err(er) => return Err(er),
         };
 
@@ -142,7 +144,7 @@ fn signed_f32_to_register(data: f32, n_bits: u8) -> Result<u32, Error> {
     let mut m = ((abs - abs.floor()) * (1u32 << shift) as f32).round() as u32;
 
     // Handle trimming integer part
-    if n_bits == 0  && n > 0 {
+    if n_bits == 0 && n > 0 {
         m = 0x7FFFFFFF;
     }
 
@@ -189,7 +191,7 @@ fn register_to_signed_f32(data: u32, n_bits: u8) -> Result<f32, Error> {
     let mut n = if n_bits == 0 {
         0
     } else if shift >= 32 {
-        data & n_mask 
+        data & n_mask
     } else {
         (data >> shift) & n_mask
     };
-- 
cgit