From 4410aacafb2141c1c0838598d11581e24aab3b0f Mon Sep 17 00:00:00 2001
From: Ulf Lilleengen <ulf.lilleengen@gmail.com>
Date: Fri, 19 Jan 2024 23:13:46 +0100
Subject: feat: add basic support for nRF51 chips to embassy-nrf

---
 embassy-nrf/src/timer.rs | 16 ++++++++++++++--
 1 file changed, 14 insertions(+), 2 deletions(-)

(limited to 'embassy-nrf/src/timer.rs')

diff --git a/embassy-nrf/src/timer.rs b/embassy-nrf/src/timer.rs
index 3dbfdac42..272fffc0a 100644
--- a/embassy-nrf/src/timer.rs
+++ b/embassy-nrf/src/timer.rs
@@ -122,12 +122,16 @@ impl<'d, T: Instance> Timer<'d, T> {
         // since changing BITMODE while running can cause 'unpredictable behaviour' according to the specification.
         this.stop();
 
+        #[cfg(not(feature = "nrf51"))]
         if is_counter {
             regs.mode.write(|w| w.mode().low_power_counter());
         } else {
             regs.mode.write(|w| w.mode().timer());
         }
 
+        #[cfg(feature = "nrf51")]
+        regs.mode.write(|w| w.mode().timer());
+
         // Make the counter's max value as high as possible.
         // TODO: is there a reason someone would want to set this lower?
         regs.bitmode.write(|w| w.bitmode()._32bit());
@@ -238,7 +242,11 @@ pub struct Cc<'d, T: Instance> {
 impl<'d, T: Instance> Cc<'d, T> {
     /// Get the current value stored in the register.
     pub fn read(&self) -> u32 {
-        T::regs().cc[self.n].read().cc().bits()
+        #[cfg(not(feature = "nrf51"))]
+        return T::regs().cc[self.n].read().cc().bits();
+
+        #[cfg(feature = "nrf51")]
+        return T::regs().cc[self.n].read().bits();
     }
 
     /// Set the value stored in the register.
@@ -246,7 +254,11 @@ impl<'d, T: Instance> Cc<'d, T> {
     /// `event_compare` will fire when the timer's counter reaches this value.
     pub fn write(&self, value: u32) {
         // SAFETY: there are no invalid values for the CC register.
-        T::regs().cc[self.n].write(|w| unsafe { w.cc().bits(value) })
+        #[cfg(not(feature = "nrf51"))]
+        T::regs().cc[self.n].write(|w| unsafe { w.cc().bits(value) });
+
+        #[cfg(feature = "nrf51")]
+        T::regs().cc[self.n].write(|w| unsafe { w.bits(value) });
     }
 
     /// Capture the current value of the timer's counter in this register, and return it.
-- 
cgit 


From 3739cc069914861d891a21734b3da9418bd01e9f Mon Sep 17 00:00:00 2001
From: Ulf Lilleengen <ulf.lilleengen@gmail.com>
Date: Thu, 25 Jan 2024 08:38:28 +0100
Subject: fix warnings

---
 embassy-nrf/src/timer.rs | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'embassy-nrf/src/timer.rs')

diff --git a/embassy-nrf/src/timer.rs b/embassy-nrf/src/timer.rs
index 272fffc0a..3c35baee5 100644
--- a/embassy-nrf/src/timer.rs
+++ b/embassy-nrf/src/timer.rs
@@ -111,7 +111,7 @@ impl<'d, T: Instance> Timer<'d, T> {
         Self::new_inner(timer, true)
     }
 
-    fn new_inner(timer: impl Peripheral<P = T> + 'd, is_counter: bool) -> Self {
+    fn new_inner(timer: impl Peripheral<P = T> + 'd, _is_counter: bool) -> Self {
         into_ref!(timer);
 
         let regs = T::regs();
@@ -123,7 +123,7 @@ impl<'d, T: Instance> Timer<'d, T> {
         this.stop();
 
         #[cfg(not(feature = "nrf51"))]
-        if is_counter {
+        if _is_counter {
             regs.mode.write(|w| w.mode().low_power_counter());
         } else {
             regs.mode.write(|w| w.mode().timer());
-- 
cgit