From 921780e6bfb9bcb2cd087b8aa8b094d792c99fa2 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Thu, 8 Jun 2023 16:08:40 +0200 Subject: Make interrupt module more standard. - Move typelevel interrupts to a special-purpose mod: `embassy_xx::interrupt::typelevel`. - Reexport the PAC interrupt enum in `embassy_xx::interrupt`. This has a few advantages: - The `embassy_xx::interrupt` module is now more "standard". - It works with `cortex-m` functions for manipulating interrupts, for example. - It works with RTIC. - the interrupt enum allows holding value that can be "any interrupt at runtime", this can't be done with typelevel irqs. - When "const-generics on enums" is stable, we can remove the typelevel interrupts without disruptive changes to `embassy_xx::interrupt`. --- embassy-rp/src/multicore.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'embassy-rp/src/multicore.rs') diff --git a/embassy-rp/src/multicore.rs b/embassy-rp/src/multicore.rs index 807fda57b..e1246ce8f 100644 --- a/embassy-rp/src/multicore.rs +++ b/embassy-rp/src/multicore.rs @@ -50,7 +50,7 @@ use core::mem::ManuallyDrop; use core::sync::atomic::{compiler_fence, AtomicBool, Ordering}; -use crate::interrupt::Interrupt; +use crate::interrupt::InterruptExt; use crate::peripherals::CORE1; use crate::{gpio, interrupt, pac}; @@ -156,7 +156,7 @@ where IS_CORE1_INIT.store(true, Ordering::Release); // Enable fifo interrupt on CORE1 for `pause` functionality. - unsafe { interrupt::SIO_IRQ_PROC1::enable() }; + unsafe { interrupt::SIO_IRQ_PROC1.enable() }; entry() } -- cgit From 8c93805ab5a13c784e072c8e6e59b354ee902d99 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Thu, 8 Jun 2023 18:00:19 +0200 Subject: Add `rt` feature to HALs, cfg out interrupt handling when not set. --- embassy-rp/src/multicore.rs | 2 ++ 1 file changed, 2 insertions(+) (limited to 'embassy-rp/src/multicore.rs') diff --git a/embassy-rp/src/multicore.rs b/embassy-rp/src/multicore.rs index e1246ce8f..2a7e4822a 100644 --- a/embassy-rp/src/multicore.rs +++ b/embassy-rp/src/multicore.rs @@ -106,6 +106,7 @@ impl Stack { } } +#[cfg(feature = "rt")] #[interrupt] #[link_section = ".data.ram_func"] unsafe fn SIO_IRQ_PROC1() { @@ -297,6 +298,7 @@ fn fifo_read() -> u32 { // Pop a value from inter-core FIFO, `wfe` until available #[inline(always)] +#[allow(unused)] fn fifo_read_wfe() -> u32 { unsafe { let sio = pac::SIO; -- cgit