From 883a998b8da7274d1c157157d5a5d4110904a93c Mon Sep 17 00:00:00 2001
From: Alex Strandberg <8642246+alexstrandberg@users.noreply.github.com>
Date: Mon, 24 Nov 2025 17:03:29 -0500
Subject: embassy-rp: add support for TX-only, no SCK SPI

---
 embassy-rp/CHANGELOG.md |  1 +
 embassy-rp/src/spi.rs   | 25 +++++++++++++++++++++++++
 2 files changed, 26 insertions(+)

(limited to 'embassy-rp')

diff --git a/embassy-rp/CHANGELOG.md b/embassy-rp/CHANGELOG.md
index 4b0d738a7..fa8609bbf 100644
--- a/embassy-rp/CHANGELOG.md
+++ b/embassy-rp/CHANGELOG.md
@@ -18,6 +18,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 - Add reset_to_usb_boot for rp235x ([#4705](https://github.com/embassy-rs/embassy/pull/4705))
 - Add fix #4822 in PIO onewire. Change to disable the state machine before setting y register ([#4824](https://github.com/embassy-rs/embassy/pull/4824))
 - Add PIO::Ws2812 color order support
+- Add TX-only, no SCK SPI support
 
 ## 0.8.0 - 2025-08-26
 
diff --git a/embassy-rp/src/spi.rs b/embassy-rp/src/spi.rs
index d9410e78d..39f128214 100644
--- a/embassy-rp/src/spi.rs
+++ b/embassy-rp/src/spi.rs
@@ -308,6 +308,11 @@ impl<'d, T: Instance> Spi<'d, T, Blocking> {
         )
     }
 
+    /// Create an SPI driver in blocking mode supporting writes only, without SCK pin.
+    pub fn new_blocking_txonly_nosck(inner: Peri<'d, T>, mosi: Peri<'d, impl MosiPin<T> + 'd>, config: Config) -> Self {
+        Self::new_inner(inner, None, Some(mosi.into()), None, None, None, None, config)
+    }
+
     /// Create an SPI driver in blocking mode supporting reads only.
     pub fn new_blocking_rxonly(
         inner: Peri<'d, T>,
@@ -371,6 +376,26 @@ impl<'d, T: Instance> Spi<'d, T, Async> {
         )
     }
 
+    /// Create an SPI driver in async mode supporting DMA write operations only,
+    /// without SCK pin.
+    pub fn new_txonly_nosck(
+        inner: Peri<'d, T>,
+        mosi: Peri<'d, impl MosiPin<T> + 'd>,
+        tx_dma: Peri<'d, impl Channel>,
+        config: Config,
+    ) -> Self {
+        Self::new_inner(
+            inner,
+            None,
+            Some(mosi.into()),
+            None,
+            None,
+            Some(tx_dma.into()),
+            None,
+            config,
+        )
+    }
+
     /// Create an SPI driver in async mode supporting DMA read operations only.
     pub fn new_rxonly(
         inner: Peri<'d, T>,
-- 
cgit