From 2b7e76efe9916170cba69da964d53c19a246ae45 Mon Sep 17 00:00:00 2001 From: Alexandros Liarokapis Date: Sat, 17 Aug 2024 00:26:33 +0300 Subject: Fix dma nvic issues on dual core lines This commit addresses #3256 by disabling dma NVIC interrupt enablement at startup. Instead, per-channel NVIC interrupt enablement is now done with the rest of the dma channel configuration. This ensures that each core will only handle the interrupts of the DMA channels that it uses. --- embassy-stm32/src/lib.rs | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) (limited to 'embassy-stm32/src/lib.rs') diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs index 12ebbae2d..98695e738 100644 --- a/embassy-stm32/src/lib.rs +++ b/embassy-stm32/src/lib.rs @@ -197,6 +197,7 @@ pub use crate::pac::NVIC_PRIO_BITS; /// `embassy-stm32` global configuration. #[non_exhaustive] +#[derive(Clone, Copy)] pub struct Config { /// RCC config. pub rcc: rcc::Config, @@ -303,6 +304,7 @@ mod dual_core { pub struct SharedData { init_flag: AtomicUsize, clocks: UnsafeCell>, + config: UnsafeCell>, } unsafe impl Sync for SharedData {} @@ -325,6 +327,8 @@ mod dual_core { rcc::set_freqs_ptr(shared_data.clocks.get()); let p = init_hw(config); + unsafe { *shared_data.config.get() }.write(config); + shared_data.init_flag.store(INIT_DONE_FLAG, Ordering::SeqCst); p @@ -372,9 +376,23 @@ mod dual_core { fn init_secondary_hw(shared_data: &'static SharedData) -> Peripherals { rcc::set_freqs_ptr(shared_data.clocks.get()); + let config = unsafe { (*shared_data.config.get()).assume_init() }; + // We use different timers on the different cores, so we have to still initialize one here - #[cfg(feature = "_time-driver")] critical_section::with(|cs| { + unsafe { + dma::init( + cs, + #[cfg(bdma)] + config.bdma_interrupt_priority, + #[cfg(dma)] + config.dma_interrupt_priority, + #[cfg(gpdma)] + config.gpdma_interrupt_priority, + ) + } + + #[cfg(feature = "_time-driver")] // must be after rcc init time_driver::init(cs); }); -- cgit