From 2f269f32560ab178f62d08730909745f49b8eaef Mon Sep 17 00:00:00 2001 From: Carl St-Laurent Date: Sat, 3 Jun 2023 22:05:24 -0400 Subject: stm32/rcc: Implement basic PLL support for STM32G4 series --- embassy-stm32/src/rcc/g4.rs | 163 +++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 162 insertions(+), 1 deletion(-) (limited to 'embassy-stm32/src') diff --git a/embassy-stm32/src/rcc/g4.rs b/embassy-stm32/src/rcc/g4.rs index 7e748c7b5..13dced73d 100644 --- a/embassy-stm32/src/rcc/g4.rs +++ b/embassy-stm32/src/rcc/g4.rs @@ -1,4 +1,4 @@ -use stm32_metapac::rcc::vals::{Hpre, Ppre, Sw}; +use stm32_metapac::rcc::vals::{Hpre, Pllsrc, Ppre, Sw}; use crate::pac::{PWR, RCC}; use crate::rcc::{set_freqs, Clocks}; @@ -15,6 +15,7 @@ pub const LSI_FREQ: Hertz = Hertz(32_000); pub enum ClockSrc { HSE(Hertz), HSI16, + PLL(PllSrc, PllM, PllN, PllClkDiv), } /// AHB prescaler @@ -41,6 +42,128 @@ pub enum APBPrescaler { Div16, } +/// PLL clock input source +#[derive(Clone, Copy, Debug)] +pub enum PllSrc { + HSI16, + HSE(Hertz), +} + +impl Into for PllSrc { + fn into(self) -> Pllsrc { + match self { + PllSrc::HSE(..) => Pllsrc::HSE, + PllSrc::HSI16 => Pllsrc::HSI16, + } + } +} + +#[derive(Clone, Copy)] +pub enum PllClkDiv { + Div2, + Div4, + Div6, + Div8, +} + +impl PllClkDiv { + pub fn to_div(self) -> u32 { + let val: u8 = self.into(); + (val as u32 + 1) * 2 + } +} + +impl From for u8 { + fn from(val: PllClkDiv) -> u8 { + match val { + PllClkDiv::Div2 => 0b00, + PllClkDiv::Div4 => 0b01, + PllClkDiv::Div6 => 0b10, + PllClkDiv::Div8 => 0b11, + } + } +} + +seq_macro::seq!(N in 8..=127 { + #[derive(Clone, Copy)] + pub enum PllN { + #( + Mul~N, + )* + } + + impl From for u8 { + fn from(val: PllN) -> u8 { + match val { + #( + PllN::Mul~N => N, + )* + } + } + } + + impl PllN { + pub fn to_mul(self) -> u32 { + match self { + #( + PllN::Mul~N => N, + )* + } + } + } +}); + +// Pre-division +#[derive(Copy, Clone)] +pub enum PllM { + Div1, + Div2, + Div3, + Div4, + Div5, + Div6, + Div7, + Div8, + Div9, + Div10, + Div11, + Div12, + Div13, + Div14, + Div15, + Div16, +} + +impl PllM { + pub fn to_div(self) -> u32 { + let val: u8 = self.into(); + val as u32 + 1 + } +} + +impl From for u8 { + fn from(val: PllM) -> u8 { + match val { + PllM::Div1 => 0b0000, + PllM::Div2 => 0b0001, + PllM::Div3 => 0b0010, + PllM::Div4 => 0b0011, + PllM::Div5 => 0b0100, + PllM::Div6 => 0b0101, + PllM::Div7 => 0b0110, + PllM::Div8 => 0b0111, + PllM::Div9 => 0b1000, + PllM::Div10 => 0b1001, + PllM::Div11 => 0b1010, + PllM::Div12 => 0b1011, + PllM::Div13 => 0b1100, + PllM::Div14 => 0b1101, + PllM::Div15 => 0b1110, + PllM::Div16 => 0b1111, + } + } +} + impl AHBPrescaler { const fn div(self) -> u32 { match self { @@ -135,6 +258,44 @@ pub(crate) unsafe fn init(config: Config) { (freq.0, Sw::HSE) } + ClockSrc::PLL(src, prediv, mul, div) => { + let src_freq = match src { + PllSrc::HSI16 => { + // Enable HSI16 + RCC.cr().write(|w| w.set_hsion(true)); + while !RCC.cr().read().hsirdy() {} + + HSI_FREQ.0 + } + PllSrc::HSE(freq) => { + // Enable HSE + RCC.cr().write(|w| w.set_hseon(true)); + while !RCC.cr().read().hserdy() {} + + freq.0 + } + }; + + // Disable PLL + RCC.cr().modify(|w| w.set_pllon(false)); + while RCC.cr().read().pllrdy() {} + + let freq = src_freq / prediv.to_div() * mul.to_mul() / div.to_div(); + assert!(freq <= 170_000_000); + + RCC.pllcfgr().write(move |w| { + w.set_plln(mul.into()); + w.set_pllm(prediv.into()); + w.set_pllr(div.into()); + w.set_pllsrc(src.into()); + }); + + RCC.cr().modify(|w| w.set_pllon(true)); + while !RCC.cr().read().pllrdy() {} + RCC.pllcfgr().modify(|w| w.set_pllren(true)); + + (freq, Sw::PLLRCLK) + } }; RCC.cfgr().modify(|w| { -- cgit From 6fe853a7d353edcc8b0fba8773915c4269599179 Mon Sep 17 00:00:00 2001 From: Carl St-Laurent Date: Sun, 4 Jun 2023 10:58:44 -0400 Subject: Better comments --- embassy-stm32/src/rcc/g4.rs | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'embassy-stm32/src') diff --git a/embassy-stm32/src/rcc/g4.rs b/embassy-stm32/src/rcc/g4.rs index 13dced73d..7d061192b 100644 --- a/embassy-stm32/src/rcc/g4.rs +++ b/embassy-stm32/src/rcc/g4.rs @@ -261,14 +261,14 @@ pub(crate) unsafe fn init(config: Config) { ClockSrc::PLL(src, prediv, mul, div) => { let src_freq = match src { PllSrc::HSI16 => { - // Enable HSI16 + // Enable HSI16 as clock source for PLL RCC.cr().write(|w| w.set_hsion(true)); while !RCC.cr().read().hsirdy() {} HSI_FREQ.0 } PllSrc::HSE(freq) => { - // Enable HSE + // Enable HSE as clock source for PLL RCC.cr().write(|w| w.set_hseon(true)); while !RCC.cr().read().hserdy() {} @@ -276,7 +276,7 @@ pub(crate) unsafe fn init(config: Config) { } }; - // Disable PLL + // Make sure PLL is disabled while we configure it RCC.cr().modify(|w| w.set_pllon(false)); while RCC.cr().read().pllrdy() {} @@ -290,6 +290,7 @@ pub(crate) unsafe fn init(config: Config) { w.set_pllsrc(src.into()); }); + // Enable PLL RCC.cr().modify(|w| w.set_pllon(true)); while !RCC.cr().read().pllrdy() {} RCC.pllcfgr().modify(|w| w.set_pllren(true)); -- cgit From ade46489f190df685b5a81e0ccc267efc05b2de6 Mon Sep 17 00:00:00 2001 From: Carl St-Laurent Date: Sun, 4 Jun 2023 11:57:42 -0400 Subject: Added Vcore boost mode and Flash wait state --- embassy-stm32/src/rcc/g4.rs | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) (limited to 'embassy-stm32/src') diff --git a/embassy-stm32/src/rcc/g4.rs b/embassy-stm32/src/rcc/g4.rs index 7d061192b..6b1206c6a 100644 --- a/embassy-stm32/src/rcc/g4.rs +++ b/embassy-stm32/src/rcc/g4.rs @@ -1,4 +1,6 @@ +use stm32_metapac::flash::vals::Latency; use stm32_metapac::rcc::vals::{Hpre, Pllsrc, Ppre, Sw}; +use stm32_metapac::FLASH; use crate::pac::{PWR, RCC}; use crate::rcc::{set_freqs, Clocks}; @@ -283,6 +285,39 @@ pub(crate) unsafe fn init(config: Config) { let freq = src_freq / prediv.to_div() * mul.to_mul() / div.to_div(); assert!(freq <= 170_000_000); + if freq >= 150_000_000 { + // Enable Core Boost mode ([RM0440] p234) + PWR.cr5() + .modify(|w: &mut stm32_metapac::pwr::regs::Cr5| w.set_r1mode(false)); + // Set flash wait state in boost mode based on frequency ([RM0440] p191) + if freq <= 36_000_000 { + FLASH.acr().modify(|w| w.set_latency(Latency::WS0)); + } else if freq <= 68_000_000 { + FLASH.acr().modify(|w| w.set_latency(Latency::WS1)); + } else if freq <= 102_000_000 { + FLASH.acr().modify(|w| w.set_latency(Latency::WS2)); + } else if freq <= 136_000_000 { + FLASH.acr().modify(|w| w.set_latency(Latency::WS3)); + } else { + FLASH.acr().modify(|w| w.set_latency(Latency::WS4)); + } + } else { + PWR.cr5() + .modify(|w: &mut stm32_metapac::pwr::regs::Cr5| w.set_r1mode(true)); + // Set flash wait state in normal mode based on frequency ([RM0440] p191) + if freq <= 30_000_000 { + FLASH.acr().modify(|w| w.set_latency(Latency::WS0)); + } else if freq <= 60_000_000 { + FLASH.acr().modify(|w| w.set_latency(Latency::WS1)); + } else if freq <= 80_000_000 { + FLASH.acr().modify(|w| w.set_latency(Latency::WS2)); + } else if freq <= 120_000_000 { + FLASH.acr().modify(|w| w.set_latency(Latency::WS3)); + } else { + FLASH.acr().modify(|w| w.set_latency(Latency::WS4)); + } + } + RCC.pllcfgr().write(move |w| { w.set_plln(mul.into()); w.set_pllm(prediv.into()); -- cgit From 4185c10bf83b96f015ef8d861b37555fff241061 Mon Sep 17 00:00:00 2001 From: Carl St-Laurent Date: Sun, 4 Jun 2023 12:09:03 -0400 Subject: Cleanup --- embassy-stm32/src/rcc/g4.rs | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) (limited to 'embassy-stm32/src') diff --git a/embassy-stm32/src/rcc/g4.rs b/embassy-stm32/src/rcc/g4.rs index 6b1206c6a..3ba9e7eb0 100644 --- a/embassy-stm32/src/rcc/g4.rs +++ b/embassy-stm32/src/rcc/g4.rs @@ -286,9 +286,8 @@ pub(crate) unsafe fn init(config: Config) { assert!(freq <= 170_000_000); if freq >= 150_000_000 { - // Enable Core Boost mode ([RM0440] p234) - PWR.cr5() - .modify(|w: &mut stm32_metapac::pwr::regs::Cr5| w.set_r1mode(false)); + // Enable Core Boost mode on freq >= 150Mhz ([RM0440] p234) + PWR.cr5().modify(|w| w.set_r1mode(false)); // Set flash wait state in boost mode based on frequency ([RM0440] p191) if freq <= 36_000_000 { FLASH.acr().modify(|w| w.set_latency(Latency::WS0)); @@ -302,8 +301,7 @@ pub(crate) unsafe fn init(config: Config) { FLASH.acr().modify(|w| w.set_latency(Latency::WS4)); } } else { - PWR.cr5() - .modify(|w: &mut stm32_metapac::pwr::regs::Cr5| w.set_r1mode(true)); + PWR.cr5().modify(|w| w.set_r1mode(true)); // Set flash wait state in normal mode based on frequency ([RM0440] p191) if freq <= 30_000_000 { FLASH.acr().modify(|w| w.set_latency(Latency::WS0)); -- cgit From 921780e6bfb9bcb2cd087b8aa8b094d792c99fa2 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Thu, 8 Jun 2023 16:08:40 +0200 Subject: Make interrupt module more standard. - Move typelevel interrupts to a special-purpose mod: `embassy_xx::interrupt::typelevel`. - Reexport the PAC interrupt enum in `embassy_xx::interrupt`. This has a few advantages: - The `embassy_xx::interrupt` module is now more "standard". - It works with `cortex-m` functions for manipulating interrupts, for example. - It works with RTIC. - the interrupt enum allows holding value that can be "any interrupt at runtime", this can't be done with typelevel irqs. - When "const-generics on enums" is stable, we can remove the typelevel interrupts without disruptive changes to `embassy_xx::interrupt`. --- embassy-stm32/src/dcmi.rs | 24 ++++++++-------- embassy-stm32/src/dma/bdma.rs | 6 ++-- embassy-stm32/src/dma/dma.rs | 6 ++-- embassy-stm32/src/dma/gpdma.rs | 4 +-- embassy-stm32/src/eth/v1/mod.rs | 10 +++---- embassy-stm32/src/eth/v2/mod.rs | 10 +++---- embassy-stm32/src/exti.rs | 4 +-- embassy-stm32/src/flash/asynch.rs | 10 +++---- embassy-stm32/src/i2c/mod.rs | 6 ++-- embassy-stm32/src/i2c/v1.rs | 4 +-- embassy-stm32/src/i2c/v2.rs | 6 ++-- embassy-stm32/src/lib.rs | 55 ++++++++++++++++--------------------- embassy-stm32/src/sdmmc/mod.rs | 16 +++++------ embassy-stm32/src/time_driver.rs | 2 +- embassy-stm32/src/timer/mod.rs | 6 ++-- embassy-stm32/src/tl_mbox/mod.rs | 18 ++++++------ embassy-stm32/src/usart/buffered.rs | 10 +++---- embassy-stm32/src/usart/mod.rs | 18 ++++++------ embassy-stm32/src/usb/mod.rs | 6 ++-- embassy-stm32/src/usb/usb.rs | 6 ++-- embassy-stm32/src/usb_otg/mod.rs | 10 +++---- embassy-stm32/src/usb_otg/usb.rs | 8 +++--- 22 files changed, 118 insertions(+), 127 deletions(-) (limited to 'embassy-stm32/src') diff --git a/embassy-stm32/src/dcmi.rs b/embassy-stm32/src/dcmi.rs index c13915a1b..41305d273 100644 --- a/embassy-stm32/src/dcmi.rs +++ b/embassy-stm32/src/dcmi.rs @@ -8,7 +8,7 @@ use embassy_sync::waitqueue::AtomicWaker; use crate::dma::Transfer; use crate::gpio::sealed::AFType; use crate::gpio::Speed; -use crate::interrupt::Interrupt; +use crate::interrupt::typelevel::Interrupt; use crate::{interrupt, Peripheral}; /// Interrupt handler. @@ -16,7 +16,7 @@ pub struct InterruptHandler { _phantom: PhantomData, } -impl interrupt::Handler for InterruptHandler { +impl interrupt::typelevel::Handler for InterruptHandler { unsafe fn on_interrupt() { let ris = crate::pac::DCMI.ris().read(); if ris.err_ris() { @@ -119,7 +119,7 @@ where pub fn new_8bit( peri: impl Peripheral

+ 'd, dma: impl Peripheral

+ 'd, - _irq: impl interrupt::Binding> + 'd, + _irq: impl interrupt::typelevel::Binding> + 'd, d0: impl Peripheral

> + 'd, d1: impl Peripheral

> + 'd, d2: impl Peripheral

> + 'd, @@ -143,7 +143,7 @@ where pub fn new_10bit( peri: impl Peripheral

+ 'd, dma: impl Peripheral

+ 'd, - _irq: impl interrupt::Binding> + 'd, + _irq: impl interrupt::typelevel::Binding> + 'd, d0: impl Peripheral

> + 'd, d1: impl Peripheral

> + 'd, d2: impl Peripheral

> + 'd, @@ -169,7 +169,7 @@ where pub fn new_12bit( peri: impl Peripheral

+ 'd, dma: impl Peripheral

+ 'd, - _irq: impl interrupt::Binding> + 'd, + _irq: impl interrupt::typelevel::Binding> + 'd, d0: impl Peripheral

> + 'd, d1: impl Peripheral

> + 'd, d2: impl Peripheral

> + 'd, @@ -197,7 +197,7 @@ where pub fn new_14bit( peri: impl Peripheral

+ 'd, dma: impl Peripheral

+ 'd, - _irq: impl interrupt::Binding> + 'd, + _irq: impl interrupt::typelevel::Binding> + 'd, d0: impl Peripheral

> + 'd, d1: impl Peripheral

> + 'd, d2: impl Peripheral

> + 'd, @@ -227,7 +227,7 @@ where pub fn new_es_8bit( peri: impl Peripheral

+ 'd, dma: impl Peripheral

+ 'd, - _irq: impl interrupt::Binding> + 'd, + _irq: impl interrupt::typelevel::Binding> + 'd, d0: impl Peripheral

> + 'd, d1: impl Peripheral

> + 'd, d2: impl Peripheral

> + 'd, @@ -249,7 +249,7 @@ where pub fn new_es_10bit( peri: impl Peripheral

+ 'd, dma: impl Peripheral

+ 'd, - _irq: impl interrupt::Binding> + 'd, + _irq: impl interrupt::typelevel::Binding> + 'd, d0: impl Peripheral

> + 'd, d1: impl Peripheral

> + 'd, d2: impl Peripheral

> + 'd, @@ -273,7 +273,7 @@ where pub fn new_es_12bit( peri: impl Peripheral

+ 'd, dma: impl Peripheral

+ 'd, - _irq: impl interrupt::Binding> + 'd, + _irq: impl interrupt::typelevel::Binding> + 'd, d0: impl Peripheral

> + 'd, d1: impl Peripheral

> + 'd, d2: impl Peripheral

> + 'd, @@ -299,7 +299,7 @@ where pub fn new_es_14bit( peri: impl Peripheral

+ 'd, dma: impl Peripheral

+ 'd, - _irq: impl interrupt::Binding> + 'd, + _irq: impl interrupt::typelevel::Binding> + 'd, d0: impl Peripheral

> + 'd, d1: impl Peripheral

> + 'd, d2: impl Peripheral

> + 'd, @@ -570,7 +570,7 @@ mod sealed { } pub trait Instance: sealed::Instance + 'static { - type Interrupt: Interrupt; + type Interrupt: interrupt::typelevel::Interrupt; } pin_trait!(D0Pin, Instance); @@ -602,7 +602,7 @@ macro_rules! impl_peripheral { } impl Instance for crate::peripherals::$inst { - type Interrupt = crate::interrupt::$irq; + type Interrupt = crate::interrupt::typelevel::$irq; } }; } diff --git a/embassy-stm32/src/dma/bdma.rs b/embassy-stm32/src/dma/bdma.rs index 7a1ecda35..83ab4b18f 100644 --- a/embassy-stm32/src/dma/bdma.rs +++ b/embassy-stm32/src/dma/bdma.rs @@ -14,7 +14,7 @@ use super::ringbuffer::{DmaCtrl, DmaRingBuffer, OverrunError}; use super::word::{Word, WordSize}; use super::Dir; use crate::_generated::BDMA_CHANNEL_COUNT; -use crate::interrupt::Interrupt; +use crate::interrupt::typelevel::Interrupt; use crate::pac; use crate::pac::bdma::{regs, vals}; @@ -70,8 +70,8 @@ static STATE: State = State::new(); pub(crate) unsafe fn init(irq_priority: Priority) { foreach_interrupt! { ($peri:ident, bdma, $block:ident, $signal_name:ident, $irq:ident) => { - crate::interrupt::$irq::set_priority(irq_priority); - crate::interrupt::$irq::enable(); + crate::interrupt::typelevel::$irq::set_priority(irq_priority); + crate::interrupt::typelevel::$irq::enable(); }; } crate::_generated::init_bdma(); diff --git a/embassy-stm32/src/dma/dma.rs b/embassy-stm32/src/dma/dma.rs index 3b602b991..17313b310 100644 --- a/embassy-stm32/src/dma/dma.rs +++ b/embassy-stm32/src/dma/dma.rs @@ -13,7 +13,7 @@ use super::ringbuffer::{DmaCtrl, DmaRingBuffer, OverrunError}; use super::word::{Word, WordSize}; use super::Dir; use crate::_generated::DMA_CHANNEL_COUNT; -use crate::interrupt::Interrupt; +use crate::interrupt::typelevel::Interrupt; use crate::pac::dma::{regs, vals}; use crate::{interrupt, pac}; @@ -149,8 +149,8 @@ static STATE: State = State::new(); pub(crate) unsafe fn init(irq_priority: Priority) { foreach_interrupt! { ($peri:ident, dma, $block:ident, $signal_name:ident, $irq:ident) => { - interrupt::$irq::set_priority(irq_priority); - interrupt::$irq::enable(); + interrupt::typelevel::$irq::set_priority(irq_priority); + interrupt::typelevel::$irq::enable(); }; } crate::_generated::init_dma(); diff --git a/embassy-stm32/src/dma/gpdma.rs b/embassy-stm32/src/dma/gpdma.rs index 7f8b82b46..07fef360f 100644 --- a/embassy-stm32/src/dma/gpdma.rs +++ b/embassy-stm32/src/dma/gpdma.rs @@ -56,8 +56,8 @@ static STATE: State = State::new(); pub(crate) unsafe fn init(irq_priority: Priority) { foreach_interrupt! { ($peri:ident, gpdma, $block:ident, $signal_name:ident, $irq:ident) => { - crate::interrupt::$irq::set_priority(irq_priority); - crate::interrupt::$irq::enable(); + crate::interrupt::typelevel::$irq::set_priority(irq_priority); + crate::interrupt::typelevel::$irq::enable(); }; } crate::_generated::init_gpdma(); diff --git a/embassy-stm32/src/eth/v1/mod.rs b/embassy-stm32/src/eth/v1/mod.rs index a5f1a268d..540cdd027 100644 --- a/embassy-stm32/src/eth/v1/mod.rs +++ b/embassy-stm32/src/eth/v1/mod.rs @@ -5,7 +5,6 @@ mod tx_desc; use core::sync::atomic::{fence, Ordering}; -use embassy_cortex_m::interrupt::Interrupt; use embassy_hal_common::{into_ref, PeripheralRef}; use stm32_metapac::eth::vals::{Apcs, Cr, Dm, DmaomrSr, Fes, Ftf, Ifg, MbProgress, Mw, Pbl, Rsf, St, Tsf}; @@ -14,6 +13,7 @@ pub(crate) use self::tx_desc::{TDes, TDesRing}; use super::*; use crate::gpio::sealed::{AFType, Pin as __GpioPin}; use crate::gpio::AnyPin; +use crate::interrupt::InterruptExt; #[cfg(eth_v1a)] use crate::pac::AFIO; #[cfg(any(eth_v1b, eth_v1c))] @@ -24,7 +24,7 @@ use crate::{interrupt, Peripheral}; /// Interrupt handler. pub struct InterruptHandler {} -impl interrupt::Handler for InterruptHandler { +impl interrupt::typelevel::Handler for InterruptHandler { unsafe fn on_interrupt() { WAKER.wake(); @@ -100,7 +100,7 @@ impl<'d, T: Instance, P: PHY> Ethernet<'d, T, P> { pub fn new( queue: &'d mut PacketQueue, peri: impl Peripheral

+ 'd, - _irq: impl interrupt::Binding + 'd, + _irq: impl interrupt::typelevel::Binding + 'd, ref_clk: impl Peripheral

> + 'd, mdio: impl Peripheral

> + 'd, mdc: impl Peripheral

> + 'd, @@ -267,8 +267,8 @@ impl<'d, T: Instance, P: PHY> Ethernet<'d, T, P> { P::phy_reset(&mut this); P::phy_init(&mut this); - interrupt::ETH::unpend(); - interrupt::ETH::enable(); + interrupt::ETH.unpend(); + interrupt::ETH.enable(); this } diff --git a/embassy-stm32/src/eth/v2/mod.rs b/embassy-stm32/src/eth/v2/mod.rs index 9efa436ac..3e45eafd5 100644 --- a/embassy-stm32/src/eth/v2/mod.rs +++ b/embassy-stm32/src/eth/v2/mod.rs @@ -2,20 +2,20 @@ mod descriptors; use core::sync::atomic::{fence, Ordering}; -use embassy_cortex_m::interrupt::Interrupt; use embassy_hal_common::{into_ref, PeripheralRef}; pub(crate) use self::descriptors::{RDes, RDesRing, TDes, TDesRing}; use super::*; use crate::gpio::sealed::{AFType, Pin as _}; use crate::gpio::{AnyPin, Speed}; +use crate::interrupt::InterruptExt; use crate::pac::ETH; use crate::{interrupt, Peripheral}; /// Interrupt handler. pub struct InterruptHandler {} -impl interrupt::Handler for InterruptHandler { +impl interrupt::typelevel::Handler for InterruptHandler { unsafe fn on_interrupt() { WAKER.wake(); @@ -64,7 +64,7 @@ impl<'d, T: Instance, P: PHY> Ethernet<'d, T, P> { pub fn new( queue: &'d mut PacketQueue, peri: impl Peripheral

+ 'd, - _irq: impl interrupt::Binding + 'd, + _irq: impl interrupt::typelevel::Binding + 'd, ref_clk: impl Peripheral

> + 'd, mdio: impl Peripheral

> + 'd, mdc: impl Peripheral

> + 'd, @@ -238,8 +238,8 @@ impl<'d, T: Instance, P: PHY> Ethernet<'d, T, P> { P::phy_reset(&mut this); P::phy_init(&mut this); - interrupt::ETH::unpend(); - interrupt::ETH::enable(); + interrupt::ETH.unpend(); + interrupt::ETH.enable(); this } diff --git a/embassy-stm32/src/exti.rs b/embassy-stm32/src/exti.rs index c2fa31b20..a2ed07093 100644 --- a/embassy-stm32/src/exti.rs +++ b/embassy-stm32/src/exti.rs @@ -354,13 +354,13 @@ impl_exti!(EXTI15, 15); macro_rules! enable_irq { ($e:ident) => { - crate::interrupt::$e::enable(); + crate::interrupt::typelevel::$e::enable(); }; } /// safety: must be called only once pub(crate) unsafe fn init() { - use crate::interrupt::Interrupt; + use crate::interrupt::typelevel::Interrupt; foreach_exti_irq!(enable_irq); diff --git a/embassy-stm32/src/flash/asynch.rs b/embassy-stm32/src/flash/asynch.rs index 872614d4e..70a5ded62 100644 --- a/embassy-stm32/src/flash/asynch.rs +++ b/embassy-stm32/src/flash/asynch.rs @@ -1,7 +1,6 @@ use core::marker::PhantomData; use atomic_polyfill::{fence, Ordering}; -use embassy_cortex_m::interrupt::Interrupt; use embassy_hal_common::drop::OnDrop; use embassy_hal_common::into_ref; use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex; @@ -11,6 +10,7 @@ use super::{ blocking_read, ensure_sector_aligned, family, get_sector, Async, Error, Flash, FlashLayout, FLASH_BASE, FLASH_SIZE, WRITE_SIZE, }; +use crate::interrupt::InterruptExt; use crate::peripherals::FLASH; use crate::{interrupt, Peripheral}; @@ -19,12 +19,12 @@ pub(super) static REGION_ACCESS: Mutex = Mutex::new impl<'d> Flash<'d, Async> { pub fn new( p: impl Peripheral

+ 'd, - _irq: impl interrupt::Binding + 'd, + _irq: impl interrupt::typelevel::Binding + 'd, ) -> Self { into_ref!(p); - crate::interrupt::FLASH::unpend(); - unsafe { crate::interrupt::FLASH::enable() }; + crate::interrupt::FLASH.unpend(); + unsafe { crate::interrupt::FLASH.enable() }; Self { inner: p, @@ -49,7 +49,7 @@ impl<'d> Flash<'d, Async> { /// Interrupt handler pub struct InterruptHandler; -impl interrupt::Handler for InterruptHandler { +impl interrupt::typelevel::Handler for InterruptHandler { unsafe fn on_interrupt() { family::on_interrupt(); } diff --git a/embassy-stm32/src/i2c/mod.rs b/embassy-stm32/src/i2c/mod.rs index f898fcc8b..b35678ed9 100644 --- a/embassy-stm32/src/i2c/mod.rs +++ b/embassy-stm32/src/i2c/mod.rs @@ -1,6 +1,6 @@ #![macro_use] -use crate::interrupt::Interrupt; +use crate::interrupt; #[cfg_attr(i2c_v1, path = "v1.rs")] #[cfg_attr(i2c_v2, path = "v2.rs")] @@ -35,7 +35,7 @@ pub(crate) mod sealed { } pub trait Instance: sealed::Instance + 'static { - type Interrupt: Interrupt; + type Interrupt: interrupt::typelevel::Interrupt; } pin_trait!(SclPin, Instance); @@ -57,7 +57,7 @@ foreach_interrupt!( } impl Instance for peripherals::$inst { - type Interrupt = crate::interrupt::$irq; + type Interrupt = crate::interrupt::typelevel::$irq; } }; ); diff --git a/embassy-stm32/src/i2c/v1.rs b/embassy-stm32/src/i2c/v1.rs index b9be2e587..e04038886 100644 --- a/embassy-stm32/src/i2c/v1.rs +++ b/embassy-stm32/src/i2c/v1.rs @@ -16,7 +16,7 @@ pub struct InterruptHandler { _phantom: PhantomData, } -impl interrupt::Handler for InterruptHandler { +impl interrupt::typelevel::Handler for InterruptHandler { unsafe fn on_interrupt() {} } @@ -57,7 +57,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { _peri: impl Peripheral

+ 'd, scl: impl Peripheral

> + 'd, sda: impl Peripheral

> + 'd, - _irq: impl interrupt::Binding> + 'd, + _irq: impl interrupt::typelevel::Binding> + 'd, tx_dma: impl Peripheral

+ 'd, rx_dma: impl Peripheral

+ 'd, freq: Hertz, diff --git a/embassy-stm32/src/i2c/v2.rs b/embassy-stm32/src/i2c/v2.rs index 10f57f700..1aaf2b46b 100644 --- a/embassy-stm32/src/i2c/v2.rs +++ b/embassy-stm32/src/i2c/v2.rs @@ -3,7 +3,6 @@ use core::future::poll_fn; use core::marker::PhantomData; use core::task::Poll; -use embassy_cortex_m::interrupt::Interrupt; use embassy_embedded_hal::SetConfig; use embassy_hal_common::drop::OnDrop; use embassy_hal_common::{into_ref, PeripheralRef}; @@ -13,6 +12,7 @@ use crate::dma::{NoDma, Transfer}; use crate::gpio::sealed::AFType; use crate::gpio::Pull; use crate::i2c::{Error, Instance, SclPin, SdaPin}; +use crate::interrupt::typelevel::Interrupt; use crate::pac::i2c; use crate::time::Hertz; use crate::{interrupt, Peripheral}; @@ -22,7 +22,7 @@ pub struct InterruptHandler { _phantom: PhantomData, } -impl interrupt::Handler for InterruptHandler { +impl interrupt::typelevel::Handler for InterruptHandler { unsafe fn on_interrupt() { let regs = T::regs(); let isr = regs.isr().read(); @@ -78,7 +78,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { peri: impl Peripheral

+ 'd, scl: impl Peripheral

> + 'd, sda: impl Peripheral

> + 'd, - _irq: impl interrupt::Binding> + 'd, + _irq: impl interrupt::typelevel::Binding> + 'd, tx_dma: impl Peripheral

+ 'd, rx_dma: impl Peripheral

+ 'd, freq: Hertz, diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs index 75d8af3dd..b42864567 100644 --- a/embassy-stm32/src/lib.rs +++ b/embassy-stm32/src/lib.rs @@ -72,46 +72,39 @@ pub(crate) mod _generated { include!(concat!(env!("OUT_DIR"), "/_generated.rs")); } -pub mod interrupt { - //! Interrupt definitions and macros to bind them. - pub use cortex_m::interrupt::{CriticalSection, Mutex}; - pub use embassy_cortex_m::interrupt::{Binding, Handler, Interrupt, Priority}; - - pub use crate::_generated::interrupt::*; - - /// Macro to bind interrupts to handlers. - /// - /// This defines the right interrupt handlers, and creates a unit struct (like `struct Irqs;`) - /// and implements the right [`Binding`]s for it. You can pass this struct to drivers to - /// prove at compile-time that the right interrupts have been bound. - // developer note: this macro can't be in `embassy-cortex-m` due to the use of `$crate`. - #[macro_export] - macro_rules! bind_interrupts { - ($vis:vis struct $name:ident { $($irq:ident => $($handler:ty),*;)* }) => { - $vis struct $name; - - $( - #[allow(non_snake_case)] - #[no_mangle] - unsafe extern "C" fn $irq() { - $( - <$handler as $crate::interrupt::Handler<$crate::interrupt::$irq>>::on_interrupt(); - )* - } - +pub use crate::_generated::interrupt; + +/// Macro to bind interrupts to handlers. +/// +/// This defines the right interrupt handlers, and creates a unit struct (like `struct Irqs;`) +/// and implements the right [`Binding`]s for it. You can pass this struct to drivers to +/// prove at compile-time that the right interrupts have been bound. +// developer note: this macro can't be in `embassy-cortex-m` due to the use of `$crate`. +#[macro_export] +macro_rules! bind_interrupts { + ($vis:vis struct $name:ident { $($irq:ident => $($handler:ty),*;)* }) => { + $vis struct $name; + + $( + #[allow(non_snake_case)] + #[no_mangle] + unsafe extern "C" fn $irq() { $( - unsafe impl $crate::interrupt::Binding<$crate::interrupt::$irq, $handler> for $name {} + <$handler as $crate::interrupt::typelevel::Handler<$crate::interrupt::typelevel::$irq>>::on_interrupt(); )* + } + + $( + unsafe impl $crate::interrupt::typelevel::Binding<$crate::interrupt::typelevel::$irq, $handler> for $name {} )* - }; - } + )* + }; } // Reexports pub use _generated::{peripherals, Peripherals}; pub use embassy_cortex_m::executor; use embassy_cortex_m::interrupt::Priority; -pub use embassy_cortex_m::interrupt::_export::interrupt; pub use embassy_hal_common::{into_ref, Peripheral, PeripheralRef}; #[cfg(feature = "unstable-pac")] pub use stm32_metapac as pac; diff --git a/embassy-stm32/src/sdmmc/mod.rs b/embassy-stm32/src/sdmmc/mod.rs index 3cc17aa68..28eb49ab6 100644 --- a/embassy-stm32/src/sdmmc/mod.rs +++ b/embassy-stm32/src/sdmmc/mod.rs @@ -14,7 +14,7 @@ use sdio_host::{BusWidth, CardCapacity, CardStatus, CurrentState, SDStatus, CID, use crate::dma::NoDma; use crate::gpio::sealed::{AFType, Pin}; use crate::gpio::{AnyPin, Pull, Speed}; -use crate::interrupt::Interrupt; +use crate::interrupt::typelevel::Interrupt; use crate::pac::sdmmc::Sdmmc as RegBlock; use crate::rcc::RccPeripheral; use crate::time::Hertz; @@ -42,7 +42,7 @@ impl InterruptHandler { } } -impl interrupt::Handler for InterruptHandler { +impl interrupt::typelevel::Handler for InterruptHandler { unsafe fn on_interrupt() { Self::data_interrupts(false); T::state().wake(); @@ -276,7 +276,7 @@ pub struct Sdmmc<'d, T: Instance, Dma: SdmmcDma = NoDma> { impl<'d, T: Instance, Dma: SdmmcDma> Sdmmc<'d, T, Dma> { pub fn new_1bit( sdmmc: impl Peripheral

+ 'd, - _irq: impl interrupt::Binding> + 'd, + _irq: impl interrupt::typelevel::Binding> + 'd, dma: impl Peripheral

+ 'd, clk: impl Peripheral

> + 'd, cmd: impl Peripheral

> + 'd, @@ -310,7 +310,7 @@ impl<'d, T: Instance, Dma: SdmmcDma> Sdmmc<'d, T, Dma> { pub fn new_4bit( sdmmc: impl Peripheral

+ 'd, - _irq: impl interrupt::Binding> + 'd, + _irq: impl interrupt::typelevel::Binding> + 'd, dma: impl Peripheral

+ 'd, clk: impl Peripheral

> + 'd, cmd: impl Peripheral

> + 'd, @@ -356,7 +356,7 @@ impl<'d, T: Instance, Dma: SdmmcDma> Sdmmc<'d, T, Dma> { impl<'d, T: Instance> Sdmmc<'d, T, NoDma> { pub fn new_1bit( sdmmc: impl Peripheral

+ 'd, - _irq: impl interrupt::Binding> + 'd, + _irq: impl interrupt::typelevel::Binding> + 'd, clk: impl Peripheral

> + 'd, cmd: impl Peripheral

> + 'd, d0: impl Peripheral

> + 'd, @@ -389,7 +389,7 @@ impl<'d, T: Instance> Sdmmc<'d, T, NoDma> { pub fn new_4bit( sdmmc: impl Peripheral

+ 'd, - _irq: impl interrupt::Binding> + 'd, + _irq: impl interrupt::typelevel::Binding> + 'd, clk: impl Peripheral

> + 'd, cmd: impl Peripheral

> + 'd, d0: impl Peripheral

> + 'd, @@ -1401,7 +1401,7 @@ pub(crate) mod sealed { use super::*; pub trait Instance { - type Interrupt: Interrupt; + type Interrupt: interrupt::typelevel::Interrupt; fn regs() -> RegBlock; fn state() -> &'static AtomicWaker; @@ -1490,7 +1490,7 @@ cfg_if::cfg_if! { foreach_peripheral!( (sdmmc, $inst:ident) => { impl sealed::Instance for peripherals::$inst { - type Interrupt = crate::interrupt::$inst; + type Interrupt = crate::interrupt::typelevel::$inst; fn regs() -> RegBlock { crate::pac::$inst diff --git a/embassy-stm32/src/time_driver.rs b/embassy-stm32/src/time_driver.rs index bab700993..8f282bafb 100644 --- a/embassy-stm32/src/time_driver.rs +++ b/embassy-stm32/src/time_driver.rs @@ -11,7 +11,7 @@ use embassy_time::driver::{AlarmHandle, Driver}; use embassy_time::TICK_HZ; use stm32_metapac::timer::regs; -use crate::interrupt::Interrupt; +use crate::interrupt::typelevel::Interrupt; use crate::pac::timer::vals; use crate::rcc::sealed::RccPeripheral; use crate::timer::sealed::{Basic16bitInstance as BasicInstance, GeneralPurpose16bitInstance as Instance}; diff --git a/embassy-stm32/src/timer/mod.rs b/embassy-stm32/src/timer/mod.rs index 772c67686..14db97024 100644 --- a/embassy-stm32/src/timer/mod.rs +++ b/embassy-stm32/src/timer/mod.rs @@ -1,6 +1,6 @@ use stm32_metapac::timer::vals; -use crate::interrupt::Interrupt; +use crate::interrupt; use crate::rcc::sealed::RccPeripheral as __RccPeri; use crate::rcc::RccPeripheral; use crate::time::Hertz; @@ -13,7 +13,7 @@ pub mod low_level { pub(crate) mod sealed { use super::*; pub trait Basic16bitInstance: RccPeripheral { - type Interrupt: Interrupt; + type Interrupt: interrupt::typelevel::Interrupt; fn regs() -> crate::pac::timer::TimBasic; @@ -57,7 +57,7 @@ pub trait Basic16bitInstance: sealed::Basic16bitInstance + 'static {} macro_rules! impl_basic_16bit_timer { ($inst:ident, $irq:ident) => { impl sealed::Basic16bitInstance for crate::peripherals::$inst { - type Interrupt = crate::interrupt::$irq; + type Interrupt = crate::interrupt::typelevel::$irq; fn regs() -> crate::pac::timer::TimBasic { crate::pac::timer::TimBasic(crate::pac::$inst.0) diff --git a/embassy-stm32/src/tl_mbox/mod.rs b/embassy-stm32/src/tl_mbox/mod.rs index efbbf2d1d..d39c78b2c 100644 --- a/embassy-stm32/src/tl_mbox/mod.rs +++ b/embassy-stm32/src/tl_mbox/mod.rs @@ -2,7 +2,6 @@ use core::mem::MaybeUninit; use atomic_polyfill::{compiler_fence, Ordering}; use bit_field::BitField; -use embassy_cortex_m::interrupt::Interrupt; use embassy_hal_common::{into_ref, Peripheral, PeripheralRef}; use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex; use embassy_sync::channel::Channel; @@ -15,6 +14,7 @@ use self::shci::{shci_ble_init, ShciBleInitCmdParam}; use self::sys::Sys; use self::unsafe_linked_list::LinkedListNode; use crate::interrupt; +use crate::interrupt::InterruptExt; use crate::peripherals::IPCC; pub use crate::tl_mbox::ipcc::Config; use crate::tl_mbox::ipcc::Ipcc; @@ -63,7 +63,7 @@ pub struct FusInfoTable { /// Interrupt handler. pub struct ReceiveInterruptHandler {} -impl interrupt::Handler for ReceiveInterruptHandler { +impl interrupt::typelevel::Handler for ReceiveInterruptHandler { unsafe fn on_interrupt() { // info!("ipcc rx interrupt"); @@ -79,7 +79,7 @@ impl interrupt::Handler for ReceiveInterruptHandler { pub struct TransmitInterruptHandler {} -impl interrupt::Handler for TransmitInterruptHandler { +impl interrupt::typelevel::Handler for TransmitInterruptHandler { unsafe fn on_interrupt() { // info!("ipcc tx interrupt"); @@ -324,8 +324,8 @@ impl<'d> TlMbox<'d> { /// initializes low-level transport between CPU1 and BLE stack on CPU2 pub fn new( ipcc: impl Peripheral

+ 'd, - _irqs: impl interrupt::Binding - + interrupt::Binding, + _irqs: impl interrupt::typelevel::Binding + + interrupt::typelevel::Binding, config: Config, ) -> Self { into_ref!(ipcc); @@ -379,11 +379,11 @@ impl<'d> TlMbox<'d> { MemoryManager::enable(); // enable interrupts - crate::interrupt::IPCC_C1_RX::unpend(); - crate::interrupt::IPCC_C1_TX::unpend(); + crate::interrupt::IPCC_C1_RX.unpend(); + crate::interrupt::IPCC_C1_TX.unpend(); - unsafe { crate::interrupt::IPCC_C1_RX::enable() }; - unsafe { crate::interrupt::IPCC_C1_TX::enable() }; + unsafe { crate::interrupt::IPCC_C1_RX.enable() }; + unsafe { crate::interrupt::IPCC_C1_TX.enable() }; Self { _ipcc: ipcc } } diff --git a/embassy-stm32/src/usart/buffered.rs b/embassy-stm32/src/usart/buffered.rs index 252e945da..613da5674 100644 --- a/embassy-stm32/src/usart/buffered.rs +++ b/embassy-stm32/src/usart/buffered.rs @@ -2,18 +2,18 @@ use core::future::poll_fn; use core::slice; use core::task::Poll; -use embassy_cortex_m::interrupt::Interrupt; use embassy_hal_common::atomic_ring_buffer::RingBuffer; use embassy_sync::waitqueue::AtomicWaker; use super::*; +use crate::interrupt::typelevel::Interrupt; /// Interrupt handler. pub struct InterruptHandler { _phantom: PhantomData, } -impl interrupt::Handler for InterruptHandler { +impl interrupt::typelevel::Handler for InterruptHandler { unsafe fn on_interrupt() { let r = T::regs(); let state = T::buffered_state(); @@ -115,7 +115,7 @@ pub struct BufferedUartRx<'d, T: BasicInstance> { impl<'d, T: BasicInstance> BufferedUart<'d, T> { pub fn new( peri: impl Peripheral

+ 'd, - _irq: impl interrupt::Binding> + 'd, + _irq: impl interrupt::typelevel::Binding> + 'd, rx: impl Peripheral

> + 'd, tx: impl Peripheral

> + 'd, tx_buffer: &'d mut [u8], @@ -130,7 +130,7 @@ impl<'d, T: BasicInstance> BufferedUart<'d, T> { pub fn new_with_rtscts( peri: impl Peripheral

+ 'd, - _irq: impl interrupt::Binding> + 'd, + _irq: impl interrupt::typelevel::Binding> + 'd, rx: impl Peripheral

> + 'd, tx: impl Peripheral

> + 'd, rts: impl Peripheral

> + 'd, @@ -159,7 +159,7 @@ impl<'d, T: BasicInstance> BufferedUart<'d, T> { #[cfg(not(any(usart_v1, usart_v2)))] pub fn new_with_de( peri: impl Peripheral

+ 'd, - _irq: impl interrupt::Binding> + 'd, + _irq: impl interrupt::typelevel::Binding> + 'd, rx: impl Peripheral

> + 'd, tx: impl Peripheral

> + 'd, de: impl Peripheral

> + 'd, diff --git a/embassy-stm32/src/usart/mod.rs b/embassy-stm32/src/usart/mod.rs index ef1080153..da3644a81 100644 --- a/embassy-stm32/src/usart/mod.rs +++ b/embassy-stm32/src/usart/mod.rs @@ -5,13 +5,13 @@ use core::marker::PhantomData; use core::sync::atomic::{compiler_fence, Ordering}; use core::task::Poll; -use embassy_cortex_m::interrupt::Interrupt; use embassy_hal_common::drop::OnDrop; use embassy_hal_common::{into_ref, PeripheralRef}; use futures::future::{select, Either}; use crate::dma::{NoDma, Transfer}; use crate::gpio::sealed::AFType; +use crate::interrupt::typelevel::Interrupt; #[cfg(not(any(usart_v1, usart_v2)))] #[allow(unused_imports)] use crate::pac::usart::regs::Isr as Sr; @@ -31,7 +31,7 @@ pub struct InterruptHandler { _phantom: PhantomData, } -impl interrupt::Handler for InterruptHandler { +impl interrupt::typelevel::Handler for InterruptHandler { unsafe fn on_interrupt() { let r = T::regs(); let s = T::state(); @@ -281,7 +281,7 @@ impl<'d, T: BasicInstance, RxDma> UartRx<'d, T, RxDma> { /// Useful if you only want Uart Rx. It saves 1 pin and consumes a little less power. pub fn new( peri: impl Peripheral

+ 'd, - _irq: impl interrupt::Binding> + 'd, + _irq: impl interrupt::typelevel::Binding> + 'd, rx: impl Peripheral

> + 'd, rx_dma: impl Peripheral

+ 'd, config: Config, @@ -294,7 +294,7 @@ impl<'d, T: BasicInstance, RxDma> UartRx<'d, T, RxDma> { pub fn new_with_rts( peri: impl Peripheral

+ 'd, - _irq: impl interrupt::Binding> + 'd, + _irq: impl interrupt::typelevel::Binding> + 'd, rx: impl Peripheral

> + 'd, rts: impl Peripheral

> + 'd, rx_dma: impl Peripheral

+ 'd, @@ -650,7 +650,7 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> { peri: impl Peripheral

+ 'd, rx: impl Peripheral

> + 'd, tx: impl Peripheral

> + 'd, - _irq: impl interrupt::Binding> + 'd, + _irq: impl interrupt::typelevel::Binding> + 'd, tx_dma: impl Peripheral

+ 'd, rx_dma: impl Peripheral

+ 'd, config: Config, @@ -665,7 +665,7 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> { peri: impl Peripheral

+ 'd, rx: impl Peripheral

> + 'd, tx: impl Peripheral

> + 'd, - _irq: impl interrupt::Binding> + 'd, + _irq: impl interrupt::typelevel::Binding> + 'd, rts: impl Peripheral

> + 'd, cts: impl Peripheral

> + 'd, tx_dma: impl Peripheral

+ 'd, @@ -693,7 +693,7 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> { peri: impl Peripheral

+ 'd, rx: impl Peripheral

> + 'd, tx: impl Peripheral

> + 'd, - _irq: impl interrupt::Binding> + 'd, + _irq: impl interrupt::typelevel::Binding> + 'd, de: impl Peripheral

> + 'd, tx_dma: impl Peripheral

+ 'd, rx_dma: impl Peripheral

+ 'd, @@ -1179,7 +1179,7 @@ pub(crate) mod sealed { pub trait BasicInstance: crate::rcc::RccPeripheral { const KIND: Kind; - type Interrupt: crate::interrupt::Interrupt; + type Interrupt: interrupt::typelevel::Interrupt; fn regs() -> Regs; fn state() -> &'static State; @@ -1211,7 +1211,7 @@ macro_rules! impl_usart { ($inst:ident, $irq:ident, $kind:expr) => { impl sealed::BasicInstance for crate::peripherals::$inst { const KIND: Kind = $kind; - type Interrupt = crate::interrupt::$irq; + type Interrupt = crate::interrupt::typelevel::$irq; fn regs() -> Regs { Regs(crate::pac::$inst.0) diff --git a/embassy-stm32/src/usb/mod.rs b/embassy-stm32/src/usb/mod.rs index fbd1fa823..bee287fe6 100644 --- a/embassy-stm32/src/usb/mod.rs +++ b/embassy-stm32/src/usb/mod.rs @@ -1,4 +1,4 @@ -use crate::interrupt::Interrupt; +use crate::interrupt; use crate::rcc::RccPeripheral; #[cfg(feature = "nightly")] @@ -13,7 +13,7 @@ pub(crate) mod sealed { } pub trait Instance: sealed::Instance + RccPeripheral + 'static { - type Interrupt: Interrupt; + type Interrupt: interrupt::typelevel::Interrupt; } // Internal PHY pins @@ -29,7 +29,7 @@ foreach_interrupt!( } impl Instance for crate::peripherals::$inst { - type Interrupt = crate::interrupt::$irq; + type Interrupt = crate::interrupt::typelevel::$irq; } }; ); diff --git a/embassy-stm32/src/usb/usb.rs b/embassy-stm32/src/usb/usb.rs index 134107978..7486bd376 100644 --- a/embassy-stm32/src/usb/usb.rs +++ b/embassy-stm32/src/usb/usb.rs @@ -14,7 +14,7 @@ use embassy_usb_driver::{ use super::{DmPin, DpPin, Instance}; use crate::gpio::sealed::AFType; -use crate::interrupt::Interrupt; +use crate::interrupt::typelevel::Interrupt; use crate::pac::usb::regs; use crate::pac::usb::vals::{EpType, Stat}; use crate::pac::USBRAM; @@ -26,7 +26,7 @@ pub struct InterruptHandler { _phantom: PhantomData, } -impl interrupt::Handler for InterruptHandler { +impl interrupt::typelevel::Handler for InterruptHandler { unsafe fn on_interrupt() { unsafe { let regs = T::regs(); @@ -255,7 +255,7 @@ pub struct Driver<'d, T: Instance> { impl<'d, T: Instance> Driver<'d, T> { pub fn new( _usb: impl Peripheral

+ 'd, - _irq: impl interrupt::Binding> + 'd, + _irq: impl interrupt::typelevel::Binding> + 'd, dp: impl Peripheral

> + 'd, dm: impl Peripheral

> + 'd, ) -> Self { diff --git a/embassy-stm32/src/usb_otg/mod.rs b/embassy-stm32/src/usb_otg/mod.rs index 193e0df0d..317264cbb 100644 --- a/embassy-stm32/src/usb_otg/mod.rs +++ b/embassy-stm32/src/usb_otg/mod.rs @@ -1,7 +1,5 @@ -use embassy_cortex_m::interrupt::Interrupt; - -use crate::peripherals; use crate::rcc::RccPeripheral; +use crate::{interrupt, peripherals}; #[cfg(feature = "nightly")] mod usb; @@ -25,7 +23,7 @@ pub(crate) mod sealed { } pub trait Instance: sealed::Instance + RccPeripheral { - type Interrupt: Interrupt; + type Interrupt: interrupt::typelevel::Interrupt; } // Internal PHY pins @@ -109,7 +107,7 @@ foreach_interrupt!( } impl Instance for peripherals::USB_OTG_FS { - type Interrupt = crate::interrupt::$irq; + type Interrupt = crate::interrupt::typelevel::$irq; } }; @@ -161,7 +159,7 @@ foreach_interrupt!( } impl Instance for peripherals::USB_OTG_HS { - type Interrupt = crate::interrupt::$irq; + type Interrupt = crate::interrupt::typelevel::$irq; } }; ); diff --git a/embassy-stm32/src/usb_otg/usb.rs b/embassy-stm32/src/usb_otg/usb.rs index e602bcb70..16cbf1a95 100644 --- a/embassy-stm32/src/usb_otg/usb.rs +++ b/embassy-stm32/src/usb_otg/usb.rs @@ -3,7 +3,6 @@ use core::marker::PhantomData; use core::task::Poll; use atomic_polyfill::{AtomicBool, AtomicU16, Ordering}; -use embassy_cortex_m::interrupt::Interrupt; use embassy_hal_common::{into_ref, Peripheral}; use embassy_sync::waitqueue::AtomicWaker; use embassy_usb_driver::{ @@ -15,6 +14,7 @@ use futures::future::poll_fn; use super::*; use crate::gpio::sealed::AFType; use crate::interrupt; +use crate::interrupt::typelevel::Interrupt; use crate::pac::otg::{regs, vals}; use crate::rcc::sealed::RccPeripheral; use crate::time::Hertz; @@ -24,7 +24,7 @@ pub struct InterruptHandler { _phantom: PhantomData, } -impl interrupt::Handler for InterruptHandler { +impl interrupt::typelevel::Handler for InterruptHandler { unsafe fn on_interrupt() { trace!("irq"); let r = T::regs(); @@ -291,7 +291,7 @@ impl<'d, T: Instance> Driver<'d, T> { /// Endpoint allocation will fail if it is too small. pub fn new_fs( _peri: impl Peripheral

+ 'd, - _irq: impl interrupt::Binding> + 'd, + _irq: impl interrupt::typelevel::Binding> + 'd, dp: impl Peripheral

> + 'd, dm: impl Peripheral

> + 'd, ep_out_buffer: &'d mut [u8], @@ -322,7 +322,7 @@ impl<'d, T: Instance> Driver<'d, T> { /// Endpoint allocation will fail if it is too small. pub fn new_hs_ulpi( _peri: impl Peripheral

+ 'd, - _irq: impl interrupt::Binding> + 'd, + _irq: impl interrupt::typelevel::Binding> + 'd, ulpi_clk: impl Peripheral

> + 'd, ulpi_dir: impl Peripheral

> + 'd, ulpi_nxt: impl Peripheral

> + 'd, -- cgit From bce24e800516402a3a3991ebde0432e5167be174 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Thu, 8 Jun 2023 18:07:44 +0200 Subject: asdg --- embassy-stm32/src/dma/gpdma.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'embassy-stm32/src') diff --git a/embassy-stm32/src/dma/gpdma.rs b/embassy-stm32/src/dma/gpdma.rs index 07fef360f..59ec205bf 100644 --- a/embassy-stm32/src/dma/gpdma.rs +++ b/embassy-stm32/src/dma/gpdma.rs @@ -12,7 +12,7 @@ use embassy_sync::waitqueue::AtomicWaker; use super::word::{Word, WordSize}; use super::Dir; use crate::_generated::GPDMA_CHANNEL_COUNT; -use crate::interrupt::Interrupt; +use crate::interrupt::typelevel::Interrupt; use crate::pac; use crate::pac::gpdma::vals; -- cgit From 5c2f02c73505cf630c2fbe9b098707a33293d702 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Thu, 8 Jun 2023 16:39:05 +0200 Subject: Reexport NVIC_PRIO_BITS at HAL root. This allows using RTIC with `#[rtic::app(device = embassy_nrf, ...)]` --- embassy-stm32/src/lib.rs | 2 ++ 1 file changed, 2 insertions(+) (limited to 'embassy-stm32/src') diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs index b42864567..565d6817c 100644 --- a/embassy-stm32/src/lib.rs +++ b/embassy-stm32/src/lib.rs @@ -111,6 +111,8 @@ pub use stm32_metapac as pac; #[cfg(not(feature = "unstable-pac"))] pub(crate) use stm32_metapac as pac; +pub use crate::pac::NVIC_PRIO_BITS; + #[non_exhaustive] pub struct Config { pub rcc: rcc::Config, -- cgit From 8c93805ab5a13c784e072c8e6e59b354ee902d99 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Thu, 8 Jun 2023 18:00:19 +0200 Subject: Add `rt` feature to HALs, cfg out interrupt handling when not set. --- embassy-stm32/src/exti.rs | 1 + embassy-stm32/src/lib.rs | 1 + embassy-stm32/src/rng.rs | 2 ++ embassy-stm32/src/time_driver.rs | 6 ++++++ 4 files changed, 10 insertions(+) (limited to 'embassy-stm32/src') diff --git a/embassy-stm32/src/exti.rs b/embassy-stm32/src/exti.rs index a2ed07093..0631ae473 100644 --- a/embassy-stm32/src/exti.rs +++ b/embassy-stm32/src/exti.rs @@ -291,6 +291,7 @@ macro_rules! foreach_exti_irq { macro_rules! impl_irq { ($e:ident) => { + #[cfg(feature = "rt")] #[interrupt] unsafe fn $e() { on_irq() diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs index 565d6817c..f8857fdd2 100644 --- a/embassy-stm32/src/lib.rs +++ b/embassy-stm32/src/lib.rs @@ -111,6 +111,7 @@ pub use stm32_metapac as pac; #[cfg(not(feature = "unstable-pac"))] pub(crate) use stm32_metapac as pac; +#[cfg(feature = "rt")] pub use crate::pac::NVIC_PRIO_BITS; #[non_exhaustive] diff --git a/embassy-stm32/src/rng.rs b/embassy-stm32/src/rng.rs index 1e16b8478..c657bf70e 100644 --- a/embassy-stm32/src/rng.rs +++ b/embassy-stm32/src/rng.rs @@ -149,6 +149,7 @@ foreach_peripheral!( }; ); +#[cfg(feature = "rt")] macro_rules! irq { ($irq:ident) => { mod rng_irq { @@ -166,6 +167,7 @@ macro_rules! irq { }; } +#[cfg(feature = "rt")] foreach_interrupt!( (RNG) => { irq!(RNG); diff --git a/embassy-stm32/src/time_driver.rs b/embassy-stm32/src/time_driver.rs index 8f282bafb..e82501a45 100644 --- a/embassy-stm32/src/time_driver.rs +++ b/embassy-stm32/src/time_driver.rs @@ -40,6 +40,7 @@ type T = peripherals::TIM15; foreach_interrupt! { (TIM2, timer, $block:ident, UP, $irq:ident) => { #[cfg(time_driver_tim2)] + #[cfg(feature = "rt")] #[interrupt] fn $irq() { DRIVER.on_interrupt() @@ -47,6 +48,7 @@ foreach_interrupt! { }; (TIM3, timer, $block:ident, UP, $irq:ident) => { #[cfg(time_driver_tim3)] + #[cfg(feature = "rt")] #[interrupt] fn $irq() { DRIVER.on_interrupt() @@ -54,6 +56,7 @@ foreach_interrupt! { }; (TIM4, timer, $block:ident, UP, $irq:ident) => { #[cfg(time_driver_tim4)] + #[cfg(feature = "rt")] #[interrupt] fn $irq() { DRIVER.on_interrupt() @@ -61,6 +64,7 @@ foreach_interrupt! { }; (TIM5, timer, $block:ident, UP, $irq:ident) => { #[cfg(time_driver_tim5)] + #[cfg(feature = "rt")] #[interrupt] fn $irq() { DRIVER.on_interrupt() @@ -68,6 +72,7 @@ foreach_interrupt! { }; (TIM12, timer, $block:ident, UP, $irq:ident) => { #[cfg(time_driver_tim12)] + #[cfg(feature = "rt")] #[interrupt] fn $irq() { DRIVER.on_interrupt() @@ -75,6 +80,7 @@ foreach_interrupt! { }; (TIM15, timer, $block:ident, UP, $irq:ident) => { #[cfg(time_driver_tim15)] + #[cfg(feature = "rt")] #[interrupt] fn $irq() { DRIVER.on_interrupt() -- cgit From 8ddeaddc674871db2125a7462c5b18eef938f497 Mon Sep 17 00:00:00 2001 From: Carl St-Laurent Date: Thu, 8 Jun 2023 20:46:48 -0400 Subject: Rename to follow ref manual and CubeIDE --- embassy-stm32/src/rcc/g4.rs | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) (limited to 'embassy-stm32/src') diff --git a/embassy-stm32/src/rcc/g4.rs b/embassy-stm32/src/rcc/g4.rs index 3ba9e7eb0..2b52416b2 100644 --- a/embassy-stm32/src/rcc/g4.rs +++ b/embassy-stm32/src/rcc/g4.rs @@ -17,7 +17,7 @@ pub const LSI_FREQ: Hertz = Hertz(32_000); pub enum ClockSrc { HSE(Hertz), HSI16, - PLL(PllSrc, PllM, PllN, PllClkDiv), + PLLCLK(PllSrc, PllM, PllN, PllR), } /// AHB prescaler @@ -61,27 +61,27 @@ impl Into for PllSrc { } #[derive(Clone, Copy)] -pub enum PllClkDiv { +pub enum PllR { Div2, Div4, Div6, Div8, } -impl PllClkDiv { +impl PllR { pub fn to_div(self) -> u32 { let val: u8 = self.into(); (val as u32 + 1) * 2 } } -impl From for u8 { - fn from(val: PllClkDiv) -> u8 { +impl From for u8 { + fn from(val: PllR) -> u8 { match val { - PllClkDiv::Div2 => 0b00, - PllClkDiv::Div4 => 0b01, - PllClkDiv::Div6 => 0b10, - PllClkDiv::Div8 => 0b11, + PllR::Div2 => 0b00, + PllR::Div4 => 0b01, + PllR::Div6 => 0b10, + PllR::Div8 => 0b11, } } } @@ -260,7 +260,7 @@ pub(crate) unsafe fn init(config: Config) { (freq.0, Sw::HSE) } - ClockSrc::PLL(src, prediv, mul, div) => { + ClockSrc::PLLCLK(src, prediv, mul, div) => { let src_freq = match src { PllSrc::HSI16 => { // Enable HSI16 as clock source for PLL -- cgit From dc8e34420f434505829cafe0cb844af9c1c0b500 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Fri, 9 Jun 2023 16:02:12 +0200 Subject: Remove executor dep+reexports from HALs. Closes #1547 --- embassy-stm32/src/lib.rs | 1 - 1 file changed, 1 deletion(-) (limited to 'embassy-stm32/src') diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs index f8857fdd2..e583993e5 100644 --- a/embassy-stm32/src/lib.rs +++ b/embassy-stm32/src/lib.rs @@ -103,7 +103,6 @@ macro_rules! bind_interrupts { // Reexports pub use _generated::{peripherals, Peripherals}; -pub use embassy_cortex_m::executor; use embassy_cortex_m::interrupt::Priority; pub use embassy_hal_common::{into_ref, Peripheral, PeripheralRef}; #[cfg(feature = "unstable-pac")] -- cgit From 98c821ac39c65903057c2d8ed320d1616e9f23ae Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Fri, 9 Jun 2023 16:14:13 +0200 Subject: Remove embassy-cortex-m crate, move stuff to embassy-hal-common. --- embassy-stm32/src/dma/bdma.rs | 2 +- embassy-stm32/src/dma/dma.rs | 2 +- embassy-stm32/src/dma/gpdma.rs | 2 +- embassy-stm32/src/dma/mod.rs | 2 +- embassy-stm32/src/lib.rs | 4 ++-- 5 files changed, 6 insertions(+), 6 deletions(-) (limited to 'embassy-stm32/src') diff --git a/embassy-stm32/src/dma/bdma.rs b/embassy-stm32/src/dma/bdma.rs index 83ab4b18f..c0a503e25 100644 --- a/embassy-stm32/src/dma/bdma.rs +++ b/embassy-stm32/src/dma/bdma.rs @@ -6,7 +6,6 @@ use core::sync::atomic::{fence, Ordering}; use core::task::{Context, Poll, Waker}; use atomic_polyfill::AtomicUsize; -use embassy_cortex_m::interrupt::Priority; use embassy_hal_common::{into_ref, Peripheral, PeripheralRef}; use embassy_sync::waitqueue::AtomicWaker; @@ -15,6 +14,7 @@ use super::word::{Word, WordSize}; use super::Dir; use crate::_generated::BDMA_CHANNEL_COUNT; use crate::interrupt::typelevel::Interrupt; +use crate::interrupt::Priority; use crate::pac; use crate::pac::bdma::{regs, vals}; diff --git a/embassy-stm32/src/dma/dma.rs b/embassy-stm32/src/dma/dma.rs index 17313b310..874cb013a 100644 --- a/embassy-stm32/src/dma/dma.rs +++ b/embassy-stm32/src/dma/dma.rs @@ -5,7 +5,6 @@ use core::sync::atomic::{fence, Ordering}; use core::task::{Context, Poll, Waker}; use atomic_polyfill::AtomicUsize; -use embassy_cortex_m::interrupt::Priority; use embassy_hal_common::{into_ref, Peripheral, PeripheralRef}; use embassy_sync::waitqueue::AtomicWaker; @@ -14,6 +13,7 @@ use super::word::{Word, WordSize}; use super::Dir; use crate::_generated::DMA_CHANNEL_COUNT; use crate::interrupt::typelevel::Interrupt; +use crate::interrupt::Priority; use crate::pac::dma::{regs, vals}; use crate::{interrupt, pac}; diff --git a/embassy-stm32/src/dma/gpdma.rs b/embassy-stm32/src/dma/gpdma.rs index 59ec205bf..3f0d5e8fa 100644 --- a/embassy-stm32/src/dma/gpdma.rs +++ b/embassy-stm32/src/dma/gpdma.rs @@ -5,7 +5,6 @@ use core::pin::Pin; use core::sync::atomic::{fence, Ordering}; use core::task::{Context, Poll}; -use embassy_cortex_m::interrupt::Priority; use embassy_hal_common::{into_ref, Peripheral, PeripheralRef}; use embassy_sync::waitqueue::AtomicWaker; @@ -13,6 +12,7 @@ use super::word::{Word, WordSize}; use super::Dir; use crate::_generated::GPDMA_CHANNEL_COUNT; use crate::interrupt::typelevel::Interrupt; +use crate::interrupt::Priority; use crate::pac; use crate::pac::gpdma::vals; diff --git a/embassy-stm32/src/dma/mod.rs b/embassy-stm32/src/dma/mod.rs index 3ac0d1b3d..0858587bd 100644 --- a/embassy-stm32/src/dma/mod.rs +++ b/embassy-stm32/src/dma/mod.rs @@ -26,11 +26,11 @@ pub mod word; use core::mem; -use embassy_cortex_m::interrupt::Priority; use embassy_hal_common::impl_peripheral; #[cfg(dmamux)] pub use self::dmamux::*; +use crate::interrupt::Priority; #[derive(Debug, Copy, Clone, PartialEq, Eq)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs index e583993e5..f4ec0a80d 100644 --- a/embassy-stm32/src/lib.rs +++ b/embassy-stm32/src/lib.rs @@ -79,7 +79,7 @@ pub use crate::_generated::interrupt; /// This defines the right interrupt handlers, and creates a unit struct (like `struct Irqs;`) /// and implements the right [`Binding`]s for it. You can pass this struct to drivers to /// prove at compile-time that the right interrupts have been bound. -// developer note: this macro can't be in `embassy-cortex-m` due to the use of `$crate`. +// developer note: this macro can't be in `embassy-hal-common` due to the use of `$crate`. #[macro_export] macro_rules! bind_interrupts { ($vis:vis struct $name:ident { $($irq:ident => $($handler:ty),*;)* }) => { @@ -103,13 +103,13 @@ macro_rules! bind_interrupts { // Reexports pub use _generated::{peripherals, Peripherals}; -use embassy_cortex_m::interrupt::Priority; pub use embassy_hal_common::{into_ref, Peripheral, PeripheralRef}; #[cfg(feature = "unstable-pac")] pub use stm32_metapac as pac; #[cfg(not(feature = "unstable-pac"))] pub(crate) use stm32_metapac as pac; +use crate::interrupt::Priority; #[cfg(feature = "rt")] pub use crate::pac::NVIC_PRIO_BITS; -- cgit