From f2266242043c0933e6d39e922400b21d726c9be3 Mon Sep 17 00:00:00 2001 From: Annie Ehler Date: Wed, 11 Jun 2025 19:37:37 -0700 Subject: Add extra methods for the low-power interrupt timer. --- embassy-stm32/src/lptim/timer/mod.rs | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) (limited to 'embassy-stm32') diff --git a/embassy-stm32/src/lptim/timer/mod.rs b/embassy-stm32/src/lptim/timer/mod.rs index a629be62b..f6abd4a74 100644 --- a/embassy-stm32/src/lptim/timer/mod.rs +++ b/embassy-stm32/src/lptim/timer/mod.rs @@ -82,6 +82,31 @@ impl<'d, T: Instance> Timer<'d, T> { pub fn get_max_compare_value(&self) -> u16 { T::regs().arr().read().arr() } + + /// Enable the timer interrupt. + pub fn enable_interrupt(&self) { + T::regs().dier().modify(|w| w.set_arrmie(true)); + } + + /// Disable the timer interrupt. + pub fn disable_interrupt(&self) { + T::regs().dier().modify(|w| w.set_arrmie(false)); + } + + /// Check if the timer interrupt is enabled. + pub fn is_interrupt_enabled(&self) -> bool { + T::regs().dier().read().arrmie() + } + + /// Check if the timer interrupt is pending. + pub fn is_interrupt_pending(&self) -> bool { + T::regs().isr().read().arrm() + } + + /// Clear the timer interrupt. + pub fn clear_interrupt(&self) { + T::regs().icr().write(|w| w.set_arrmcf(true)); + } } #[cfg(any(lptim_v2a, lptim_v2b))] -- cgit From 4301016f155fd26a3934fb9e7bd2920107a32910 Mon Sep 17 00:00:00 2001 From: Annie Ehler Date: Thu, 12 Jun 2025 04:11:49 +0000 Subject: Move the methods to the cfg gated impls to handle register renaming. --- embassy-stm32/src/lptim/timer/mod.rs | 75 ++++++++++++++++++++++++------------ 1 file changed, 50 insertions(+), 25 deletions(-) (limited to 'embassy-stm32') diff --git a/embassy-stm32/src/lptim/timer/mod.rs b/embassy-stm32/src/lptim/timer/mod.rs index f6abd4a74..648da5940 100644 --- a/embassy-stm32/src/lptim/timer/mod.rs +++ b/embassy-stm32/src/lptim/timer/mod.rs @@ -82,31 +82,6 @@ impl<'d, T: Instance> Timer<'d, T> { pub fn get_max_compare_value(&self) -> u16 { T::regs().arr().read().arr() } - - /// Enable the timer interrupt. - pub fn enable_interrupt(&self) { - T::regs().dier().modify(|w| w.set_arrmie(true)); - } - - /// Disable the timer interrupt. - pub fn disable_interrupt(&self) { - T::regs().dier().modify(|w| w.set_arrmie(false)); - } - - /// Check if the timer interrupt is enabled. - pub fn is_interrupt_enabled(&self) -> bool { - T::regs().dier().read().arrmie() - } - - /// Check if the timer interrupt is pending. - pub fn is_interrupt_pending(&self) -> bool { - T::regs().isr().read().arrm() - } - - /// Clear the timer interrupt. - pub fn clear_interrupt(&self) { - T::regs().icr().write(|w| w.set_arrmcf(true)); - } } #[cfg(any(lptim_v2a, lptim_v2b))] @@ -140,6 +115,31 @@ impl<'d, T: Instance> Timer<'d, T> { .ccmr(0) .modify(|w| w.set_ccsel(channel.index(), direction.into())); } + + /// Enable the timer interrupt. + pub fn enable_interrupt(&self) { + T::regs().dier().modify(|w| w.set_arrmie(true)); + } + + /// Disable the timer interrupt. + pub fn disable_interrupt(&self) { + T::regs().dier().modify(|w| w.set_arrmie(false)); + } + + /// Check if the timer interrupt is enabled. + pub fn is_interrupt_enabled(&self) -> bool { + T::regs().dier().read().arrmie() + } + + /// Check if the timer interrupt is pending. + pub fn is_interrupt_pending(&self) -> bool { + T::regs().isr().read().arrm() + } + + /// Clear the timer interrupt. + pub fn clear_interrupt(&self) { + T::regs().icr().write(|w| w.set_arrmcf(true)); + } } #[cfg(not(any(lptim_v2a, lptim_v2b)))] @@ -153,4 +153,29 @@ impl<'d, T: Instance> Timer<'d, T> { pub fn get_compare_value(&self) -> u16 { T::regs().cmp().read().cmp() } + + /// Enable the timer interrupt. + pub fn enable_interrupt(&self) { + T::regs().ier().modify(|w| w.set_arrmie(true)); + } + + /// Disable the timer interrupt. + pub fn disable_interrupt(&self) { + T::regs().ier().modify(|w| w.set_arrmie(false)); + } + + /// Check if the timer interrupt is enabled. + pub fn is_interrupt_enabled(&self) -> bool { + T::regs().ier().read().arrmie() + } + + /// Check if the timer interrupt is pending. + pub fn is_interrupt_pending(&self) -> bool { + T::regs().isr().read().arrm() + } + + /// Clear the timer interrupt. + pub fn clear_interrupt(&self) { + T::regs().icr().write(|w| w.set_arrmcf(true)); + } } -- cgit