From 5a1be543ac8838963a6597dda2ddf3918397e39b Mon Sep 17 00:00:00 2001 From: Gabriel Smith Date: Fri, 13 Jun 2025 12:59:56 +0000 Subject: stm32/adc/v3: allow DMA reads to loop through enabled channels Tested on an STM32H533RE. Documentation of other chips has been reviewed, but not extensively. --- embassy-stm32/CHANGELOG.md | 1 + embassy-stm32/src/adc/v3.rs | 7 ++++--- 2 files changed, 5 insertions(+), 3 deletions(-) (limited to 'embassy-stm32') diff --git a/embassy-stm32/CHANGELOG.md b/embassy-stm32/CHANGELOG.md index 301c20055..da8bce0e2 100644 --- a/embassy-stm32/CHANGELOG.md +++ b/embassy-stm32/CHANGELOG.md @@ -13,6 +13,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 - fix: Fix vrefbuf building with log feature - fix: Fix performing a hash after performing a hmac - chore: Updated stm32-metapac and stm32-data dependencies +- feat: stm32/adc/v3: allow DMA reads to loop through enable channels ## 0.3.0 - 2025-08-12 diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs index a2e42fe52..dc1faa4d1 100644 --- a/embassy-stm32/src/adc/v3.rs +++ b/embassy-stm32/src/adc/v3.rs @@ -296,7 +296,8 @@ impl<'d, T: Instance> Adc<'d, T> { /// Read one or multiple ADC channels using DMA. /// - /// `sequence` iterator and `readings` must have the same length. + /// `readings` must have a length that is a multiple of the length of the + /// `sequence` iterator. /// /// Note: The order of values in `readings` is defined by the pin ADC /// channel number and not the pin order in `sequence`. @@ -330,8 +331,8 @@ impl<'d, T: Instance> Adc<'d, T> { ) { assert!(sequence.len() != 0, "Asynchronous read sequence cannot be empty"); assert!( - sequence.len() == readings.len(), - "Sequence length must be equal to readings length" + readings.len() % sequence.len() == 0, + "Readings length must be a multiple of sequence length" ); assert!( sequence.len() <= 16, -- cgit