From abc8e450f936567ad42cb34b5d2a7941b206aa5d Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 6 Oct 2025 22:55:38 +0200 Subject: Edition 2024. --- examples/boot/bootloader/nrf/src/main.rs | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'examples/boot/bootloader/nrf/src/main.rs') diff --git a/examples/boot/bootloader/nrf/src/main.rs b/examples/boot/bootloader/nrf/src/main.rs index b849a0df3..76c4c1048 100644 --- a/examples/boot/bootloader/nrf/src/main.rs +++ b/examples/boot/bootloader/nrf/src/main.rs @@ -38,8 +38,8 @@ fn main() -> ! { unsafe { bl.load(active_offset) } } -#[no_mangle] -#[cfg_attr(target_os = "none", link_section = ".HardFault.user")] +#[unsafe(no_mangle)] +#[cfg_attr(target_os = "none", unsafe(link_section = ".HardFault.user"))] unsafe extern "C" fn HardFault() { cortex_m::peripheral::SCB::sys_reset(); } @@ -47,7 +47,7 @@ unsafe extern "C" fn HardFault() { #[exception] unsafe fn DefaultHandler(_: i16) -> ! { const SCB_ICSR: *const u32 = 0xE000_ED04 as *const u32; - let irqn = core::ptr::read_volatile(SCB_ICSR) as u8 as i16 - 16; + let irqn = unsafe { core::ptr::read_volatile(SCB_ICSR) } as u8 as i16 - 16; panic!("DefaultHandler #{:?}", irqn); } -- cgit