From b0cf9b4626e7fa99d1da82a5eb745e9ed14508de Mon Sep 17 00:00:00 2001
From: James Munns <james@onevariable.com>
Date: Thu, 18 Dec 2025 14:53:33 +0100
Subject: First basic test works

---
 examples/mcxa/src/bin/clkout.rs | 25 ++++++++++++++++++++++---
 1 file changed, 22 insertions(+), 3 deletions(-)

(limited to 'examples/mcxa/src')

diff --git a/examples/mcxa/src/bin/clkout.rs b/examples/mcxa/src/bin/clkout.rs
index e6e6a2d3d..94f7d7bbf 100644
--- a/examples/mcxa/src/bin/clkout.rs
+++ b/examples/mcxa/src/bin/clkout.rs
@@ -4,7 +4,7 @@
 use embassy_executor::Spawner;
 use embassy_mcxa::clkout::{ClockOut, ClockOutSel, Config, Div4};
 use embassy_mcxa::clocks::PoweredClock;
-use embassy_mcxa::clocks::config::{SoscConfig, SoscMode};
+use embassy_mcxa::clocks::config::{SoscConfig, SoscMode, SpllConfig, SpllMode, SpllSource};
 use embassy_mcxa::gpio::{DriveStrength, Level, Output, SlewRate};
 use embassy_time::Timer;
 use {defmt_rtt as _, embassy_mcxa as hal, panic_probe as _};
@@ -18,6 +18,18 @@ async fn main(_spawner: Spawner) {
         frequency: 8_000_000,
         power: PoweredClock::NormalEnabledDeepSleepDisabled,
     });
+    cfg.clock_cfg.spll = Some(SpllConfig {
+        source: SpllSource::Sirc, // 12MHz
+        // 12 x 32 => 384MHz
+        // 384 / (16 x 2) => 12.0MHz
+        mode: SpllMode::Mode1b {
+            m_mult: 32,
+            p_div: 16,
+            bypass_p2_div: false,
+        },
+        power: PoweredClock::NormalEnabledDeepSleepDisabled,
+        pll1_clk_div: None,
+    });
 
     let p = hal::init(cfg);
 
@@ -39,11 +51,18 @@ async fn main(_spawner: Spawner) {
         div: const { Div4::from_divisor(16).unwrap() },
         level: PoweredClock::NormalEnabledDeepSleepDisabled,
     };
+    const M1_CONFIG: Config = Config {
+        sel: ClockOutSel::Pll1Clk,
+        div: const { Div4::from_divisor(12).unwrap() },
+        level: PoweredClock::NormalEnabledDeepSleepDisabled,
+    };
 
+    #[rustfmt::skip]
     let configs = [
-        ("16K -> /1 = 16K", K16_CONFIG),
-        ("12M -> /3 = 4M", M4_CONFIG),
+        ("16K -> /1 = 16K",  K16_CONFIG),
+        ("12M -> /3 = 4M",   M4_CONFIG),
         ("8M -> /16 = 512K", K512_CONFIG),
+        ("12M-> /12 = 1M",   M1_CONFIG),
     ];
 
     loop {
-- 
cgit 


From 1a3eb7ef28c071e17f93663f7e07d7d6e9f7789e Mon Sep 17 00:00:00 2001
From: James Munns <james@onevariable.com>
Date: Thu, 18 Dec 2025 19:31:25 +0100
Subject: Cleanups, docs

---
 examples/mcxa/src/bin/clkout.rs | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

(limited to 'examples/mcxa/src')

diff --git a/examples/mcxa/src/bin/clkout.rs b/examples/mcxa/src/bin/clkout.rs
index 94f7d7bbf..c0e8c330d 100644
--- a/examples/mcxa/src/bin/clkout.rs
+++ b/examples/mcxa/src/bin/clkout.rs
@@ -19,7 +19,8 @@ async fn main(_spawner: Spawner) {
         power: PoweredClock::NormalEnabledDeepSleepDisabled,
     });
     cfg.clock_cfg.spll = Some(SpllConfig {
-        source: SpllSource::Sirc, // 12MHz
+        source: SpllSource::Sirc,
+        // 12MHz
         // 12 x 32 => 384MHz
         // 384 / (16 x 2) => 12.0MHz
         mode: SpllMode::Mode1b {
-- 
cgit