From 69badfb845c0fb43b4e4c1c2e9f74a535fcd317a Mon Sep 17 00:00:00 2001
From: Bruno Bousquet <21108660+brunob45@users.noreply.github.com>
Date: Wed, 29 May 2024 00:37:50 -0400
Subject: remove dev files

---
 examples/stm32f1/.vscode/launch.json | 33 -----------------------------
 examples/stm32f1/.vscode/tasks.json  | 21 -------------------
 examples/stm32f1/openocd.cfg         |  5 -----
 examples/stm32f1/openocd.gdb         | 40 ------------------------------------
 4 files changed, 99 deletions(-)
 delete mode 100644 examples/stm32f1/.vscode/launch.json
 delete mode 100644 examples/stm32f1/.vscode/tasks.json
 delete mode 100644 examples/stm32f1/openocd.cfg
 delete mode 100644 examples/stm32f1/openocd.gdb

(limited to 'examples/stm32f1')

diff --git a/examples/stm32f1/.vscode/launch.json b/examples/stm32f1/.vscode/launch.json
deleted file mode 100644
index 71f203614..000000000
--- a/examples/stm32f1/.vscode/launch.json
+++ /dev/null
@@ -1,33 +0,0 @@
-{
-    /* 
-     * Requires the Rust Language Server (rust-analyzer) and Cortex-Debug extensions
-     * https://marketplace.visualstudio.com/items?itemName=rust-lang.rust-analyzer
-     * https://marketplace.visualstudio.com/items?itemName=marus25.cortex-debug
-     */
-    "version": "0.2.0",
-    "configurations": [
-        {
-            /* Configuration for the STM32F446 Discovery board */
-            "type": "cortex-debug",
-            "request": "launch",
-            "name": "Debug (OpenOCD)",
-            "servertype": "openocd",
-            "cwd": "${workspaceRoot}",
-            "preLaunchTask": "Cargo Build (debug)",
-            "runToEntryPoint": "main",
-            "executable": "./target/thumbv7m-none-eabi/debug/pwm_input",
-            /* Run `cargo build --example itm` and uncomment this line to run itm example */
-            // "executable": "./target/thumbv7em-none-eabihf/debug/examples/itm",
-            "device": "STM32F103T8",
-            "configFiles": [
-                "interface/stlink.cfg",
-                "target/stm32f1x.cfg"
-            ],
-            "postLaunchCommands": [
-                "monitor arm semihosting enable"
-            ],
-            "postRestartCommands": [],
-            "postResetCommands": [],
-        }
-    ]
-}
\ No newline at end of file
diff --git a/examples/stm32f1/.vscode/tasks.json b/examples/stm32f1/.vscode/tasks.json
deleted file mode 100644
index de7013b12..000000000
--- a/examples/stm32f1/.vscode/tasks.json
+++ /dev/null
@@ -1,21 +0,0 @@
-{
-	"version": "2.0.0",
-	"tasks": [
-		{
-			"type": "cargo",
-			"command": "build",
-			"problemMatcher": [
-				"$rustc"
-			],
-			"args": [
-				"--bin",
-				"pwm_input"
-			],
-			"group": {
-				"kind": "build",
-				"isDefault": true
-			},
-			"label": "Cargo Build (debug)",
-		}
-	]
-}
\ No newline at end of file
diff --git a/examples/stm32f1/openocd.cfg b/examples/stm32f1/openocd.cfg
deleted file mode 100644
index 0325cd651..000000000
--- a/examples/stm32f1/openocd.cfg
+++ /dev/null
@@ -1,5 +0,0 @@
-# Sample OpenOCD configuration for the STM32F3DISCOVERY development board
-
-source [find interface/stlink.cfg]
-
-source [find target/stm32f1x.cfg]
diff --git a/examples/stm32f1/openocd.gdb b/examples/stm32f1/openocd.gdb
deleted file mode 100644
index 7795319fb..000000000
--- a/examples/stm32f1/openocd.gdb
+++ /dev/null
@@ -1,40 +0,0 @@
-target extended-remote :3333
-
-# print demangled symbols
-set print asm-demangle on
-
-# set backtrace limit to not have infinite backtrace loops
-set backtrace limit 32
-
-# detect unhandled exceptions, hard faults and panics
-break DefaultHandler
-break HardFault
-break rust_begin_unwind
-# # run the next few lines so the panic message is printed immediately
-# # the number needs to be adjusted for your panic handler
-# commands $bpnum
-# next 4
-# end
-
-# *try* to stop at the user entry point (it might be gone due to inlining)
-break main
-
-monitor arm semihosting enable
-
-# # send captured ITM to the file itm.fifo
-# # (the microcontroller SWO pin must be connected to the programmer SWO pin)
-# # 8000000 must match the core clock frequency
-# monitor tpiu config internal itm.txt uart off 8000000
-
-# # OR: make the microcontroller SWO pin output compatible with UART (8N1)
-# # 8000000 must match the core clock frequency
-# # 2000000 is the frequency of the SWO pin
-# monitor tpiu config external uart off 8000000 2000000
-
-# # enable ITM port 0
-# monitor itm port 0 on
-
-load
-
-# start the process but immediately halt the processor
-stepi
-- 
cgit