From 63a0e188eae16bdf3c40ec627bbfbdcaa1cf4978 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Thu, 15 Jul 2021 06:31:54 +0200 Subject: stm32/dma: fix h7 impls --- examples/stm32h7/src/bin/usart.rs | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) (limited to 'examples/stm32h7/src') diff --git a/examples/stm32h7/src/bin/usart.rs b/examples/stm32h7/src/bin/usart.rs index d8e60158b..143f94491 100644 --- a/examples/stm32h7/src/bin/usart.rs +++ b/examples/stm32h7/src/bin/usart.rs @@ -1,4 +1,3 @@ - #![no_std] #![no_main] #![feature(trait_alias)] @@ -13,12 +12,12 @@ use cortex_m::prelude::_embedded_hal_blocking_serial_Write; use embassy::executor::Executor; use embassy::time::Clock; use embassy::util::Forever; +use embassy_stm32::dma::NoDma; use embassy_stm32::usart::{Config, Uart}; -use embassy_stm32::dma_traits::NoDma; use example_common::*; -use stm32h7xx_hal as hal; use hal::prelude::*; +use stm32h7xx_hal as hal; use cortex_m_rt::entry; use stm32h7::stm32h743 as pac; @@ -60,8 +59,7 @@ fn main() -> ! { let rcc = pp.RCC.constrain(); - rcc - .sys_ck(96.mhz()) + rcc.sys_ck(96.mhz()) .pclk1(48.mhz()) .pclk2(48.mhz()) .pclk3(48.mhz()) @@ -89,7 +87,6 @@ fn main() -> ! { w }); - unsafe { embassy::time::set_clock(&ZeroClock) }; let executor = EXECUTOR.put(Executor::new()); -- cgit