From b9e13cb5d1ca3e85a02b2a37b7ee14f73663b1bd Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 23 Oct 2023 00:28:54 +0200 Subject: stm32/rcc: merge wl into l4/l5. --- examples/stm32l4/src/bin/rtc.rs | 29 +++++++++++++++++------------ 1 file changed, 17 insertions(+), 12 deletions(-) (limited to 'examples/stm32l4/src/bin/rtc.rs') diff --git a/examples/stm32l4/src/bin/rtc.rs b/examples/stm32l4/src/bin/rtc.rs index fec0a349d..69527c9ad 100644 --- a/examples/stm32l4/src/bin/rtc.rs +++ b/examples/stm32l4/src/bin/rtc.rs @@ -5,7 +5,6 @@ use chrono::{NaiveDate, NaiveDateTime}; use defmt::*; use embassy_executor::Spawner; -use embassy_stm32::rcc::{ClockSrc, LsConfig, PLLSource, Pll, PllMul, PllPreDiv, PllRDiv}; use embassy_stm32::rtc::{Rtc, RtcConfig}; use embassy_stm32::time::Hertz; use embassy_stm32::Config; @@ -15,17 +14,23 @@ use {defmt_rtt as _, panic_probe as _}; #[embassy_executor::main] async fn main(_spawner: Spawner) { let mut config = Config::default(); - config.rcc.mux = ClockSrc::PLL1_R; - config.rcc.hse = Some(Hertz::mhz(8)); - config.rcc.pll = Some(Pll { - source: PLLSource::HSE, - prediv: PllPreDiv::DIV1, - mul: PllMul::MUL20, - divp: None, - divq: None, - divr: Some(PllRDiv::DIV2), // sysclk 80Mhz clock (8 / 1 * 20 / 2) - }); - config.rcc.ls = LsConfig::default_lse(); + { + use embassy_stm32::rcc::*; + config.rcc.mux = ClockSrc::PLL1_R; + config.rcc.hse = Some(Hse { + freq: Hertz::mhz(8), + mode: HseMode::Oscillator, + }); + config.rcc.pll = Some(Pll { + source: PLLSource::HSE, + prediv: PllPreDiv::DIV1, + mul: PllMul::MUL20, + divp: None, + divq: None, + divr: Some(PllRDiv::DIV2), // sysclk 80Mhz clock (8 / 1 * 20 / 2) + }); + config.rcc.ls = LsConfig::default_lse(); + } let p = embassy_stm32::init(config); info!("Hello World!"); -- cgit