From 4fe344ebc0f4e030ff7a03755f27e66e9ad0476f Mon Sep 17 00:00:00 2001
From: Dario Nieuwenhuis <dirbaio@dirbaio.net>
Date: Mon, 13 Nov 2023 00:52:01 +0100
Subject: stm32/rcc: consistent casing and naming for PLL enums.

---
 examples/stm32u5/src/bin/usb_serial.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'examples/stm32u5/src')

diff --git a/examples/stm32u5/src/bin/usb_serial.rs b/examples/stm32u5/src/bin/usb_serial.rs
index a218d5dfd..839d6472f 100644
--- a/examples/stm32u5/src/bin/usb_serial.rs
+++ b/examples/stm32u5/src/bin/usb_serial.rs
@@ -24,7 +24,7 @@ async fn main(_spawner: Spawner) {
 
     let mut config = Config::default();
     config.rcc.mux = ClockSrc::PLL1_R(PllConfig {
-        source: PllSrc::HSI,
+        source: PllSource::HSI,
         m: Pllm::DIV2,
         n: Plln::MUL10,
         r: Plldiv::DIV1,
-- 
cgit