From 489d0be2a2971cfae7d6413b601bbd044d42e351 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 26 Feb 2024 00:00:17 +0100 Subject: stm32/rcc: unify naming sysclk field to `sys`, enum to `Sysclk`. --- examples/stm32wl/src/bin/random.rs | 2 +- examples/stm32wl/src/bin/rtc.rs | 2 +- examples/stm32wl/src/bin/uart_async.rs | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'examples/stm32wl') diff --git a/examples/stm32wl/src/bin/random.rs b/examples/stm32wl/src/bin/random.rs index 3610392be..8e9fe02b2 100644 --- a/examples/stm32wl/src/bin/random.rs +++ b/examples/stm32wl/src/bin/random.rs @@ -22,7 +22,7 @@ async fn main(_spawner: Spawner) { mode: HseMode::Bypass, prescaler: HsePrescaler::DIV1, }); - config.rcc.mux = ClockSrc::PLL1_R; + config.rcc.sys = Sysclk::PLL1_R; config.rcc.pll = Some(Pll { source: PllSource::HSE, prediv: PllPreDiv::DIV2, diff --git a/examples/stm32wl/src/bin/rtc.rs b/examples/stm32wl/src/bin/rtc.rs index 4738d5770..0c26426ef 100644 --- a/examples/stm32wl/src/bin/rtc.rs +++ b/examples/stm32wl/src/bin/rtc.rs @@ -21,7 +21,7 @@ async fn main(_spawner: Spawner) { mode: HseMode::Bypass, prescaler: HsePrescaler::DIV1, }); - config.rcc.mux = ClockSrc::PLL1_R; + config.rcc.sys = Sysclk::PLL1_R; config.rcc.pll = Some(Pll { source: PllSource::HSE, prediv: PllPreDiv::DIV2, diff --git a/examples/stm32wl/src/bin/uart_async.rs b/examples/stm32wl/src/bin/uart_async.rs index 8e545834c..3637243a0 100644 --- a/examples/stm32wl/src/bin/uart_async.rs +++ b/examples/stm32wl/src/bin/uart_async.rs @@ -20,7 +20,7 @@ but can be surely changed for your needs. #[embassy_executor::main] async fn main(_spawner: Spawner) { let mut config = embassy_stm32::Config::default(); - config.rcc.mux = embassy_stm32::rcc::ClockSrc::HSE; + config.rcc.sys = embassy_stm32::rcc::Sysclk::HSE; let p = embassy_stm32::init(config); defmt::info!("Starting system"); -- cgit