From de2773afdd3f2d06cad0632ee075e1b88aa71515 Mon Sep 17 00:00:00 2001 From: xoviat Date: Sat, 16 Sep 2023 17:41:11 -0500 Subject: stm32/rcc: convert bus prescalers to pac enums --- examples/stm32f2/src/bin/pll.rs | 4 ++-- examples/stm32h5/src/bin/eth.rs | 8 ++++---- examples/stm32h5/src/bin/usb_serial.rs | 8 ++++---- 3 files changed, 10 insertions(+), 10 deletions(-) (limited to 'examples') diff --git a/examples/stm32f2/src/bin/pll.rs b/examples/stm32f2/src/bin/pll.rs index 17f09538c..894937614 100644 --- a/examples/stm32f2/src/bin/pll.rs +++ b/examples/stm32f2/src/bin/pll.rs @@ -39,9 +39,9 @@ async fn main(_spawner: Spawner) { // System clock comes from PLL (= the 120 MHz main PLL output) config.rcc.mux = ClockSrc::PLL; // 120 MHz / 4 = 30 MHz APB1 frequency - config.rcc.apb1_pre = APBPrescaler::Div4; + config.rcc.apb1_pre = APBPrescaler::DIV4; // 120 MHz / 2 = 60 MHz APB2 frequency - config.rcc.apb2_pre = APBPrescaler::Div2; + config.rcc.apb2_pre = APBPrescaler::DIV2; let _p = embassy_stm32::init(config); diff --git a/examples/stm32h5/src/bin/eth.rs b/examples/stm32h5/src/bin/eth.rs index c32e0fdb5..fdba6cd5c 100644 --- a/examples/stm32h5/src/bin/eth.rs +++ b/examples/stm32h5/src/bin/eth.rs @@ -48,10 +48,10 @@ async fn main(spawner: Spawner) -> ! { divq: Some(2), divr: None, }); - config.rcc.ahb_pre = AHBPrescaler::NotDivided; - config.rcc.apb1_pre = APBPrescaler::NotDivided; - config.rcc.apb2_pre = APBPrescaler::NotDivided; - config.rcc.apb3_pre = APBPrescaler::NotDivided; + config.rcc.ahb_pre = AHBPrescaler::DIV1; + config.rcc.apb1_pre = APBPrescaler::DIV1; + config.rcc.apb2_pre = APBPrescaler::DIV1; + config.rcc.apb3_pre = APBPrescaler::DIV1; config.rcc.sys = Sysclk::Pll1P; config.rcc.voltage_scale = VoltageScale::Scale0; let p = embassy_stm32::init(config); diff --git a/examples/stm32h5/src/bin/usb_serial.rs b/examples/stm32h5/src/bin/usb_serial.rs index 336eed644..cbe540a06 100644 --- a/examples/stm32h5/src/bin/usb_serial.rs +++ b/examples/stm32h5/src/bin/usb_serial.rs @@ -35,10 +35,10 @@ async fn main(_spawner: Spawner) { divq: None, divr: None, }); - config.rcc.ahb_pre = AHBPrescaler::Div2; - config.rcc.apb1_pre = APBPrescaler::Div4; - config.rcc.apb2_pre = APBPrescaler::Div2; - config.rcc.apb3_pre = APBPrescaler::Div4; + config.rcc.ahb_pre = AHBPrescaler::DIV2; + config.rcc.apb1_pre = APBPrescaler::DIV4; + config.rcc.apb2_pre = APBPrescaler::DIV2; + config.rcc.apb3_pre = APBPrescaler::DIV4; config.rcc.sys = Sysclk::Pll1P; config.rcc.voltage_scale = VoltageScale::Scale0; let p = embassy_stm32::init(config); -- cgit