From 32408f4a031dff11c1c3c8c4aeb2044f1a7e8f42 Mon Sep 17 00:00:00 2001 From: xoviat Date: Thu, 13 Nov 2025 12:02:38 -0600 Subject: adc: extract c0 --- examples/stm32c0/src/bin/adc.rs | 18 ++++++------------ 1 file changed, 6 insertions(+), 12 deletions(-) (limited to 'examples') diff --git a/examples/stm32c0/src/bin/adc.rs b/examples/stm32c0/src/bin/adc.rs index b52c9e7f8..ad597b63c 100644 --- a/examples/stm32c0/src/bin/adc.rs +++ b/examples/stm32c0/src/bin/adc.rs @@ -3,7 +3,6 @@ use defmt::*; use embassy_executor::Spawner; -use embassy_stm32::adc::vals::Scandir; use embassy_stm32::adc::{Adc, AdcChannel, AnyAdcChannel, Resolution, SampleTime}; use embassy_stm32::peripherals::ADC1; use embassy_time::Timer; @@ -35,8 +34,12 @@ async fn main(_spawner: Spawner) { blocking_vref, blocking_temp, blocing_pin0 ); - let channels_seqence: [&mut AnyAdcChannel; 3] = [&mut vref, &mut temp, &mut pin0]; - adc.read(dma.reborrow(), channels_seqence.into_iter(), &mut read_buffer) + let channels_sequence: [(&mut AnyAdcChannel, SampleTime); 3] = [ + (&mut vref, SampleTime::CYCLES12_5), + (&mut temp, SampleTime::CYCLES12_5), + (&mut pin0, SampleTime::CYCLES12_5), + ]; + adc.read(dma.reborrow(), channels_sequence.into_iter(), &mut read_buffer) .await; // Values are ordered according to hardware ADC channel number! info!( @@ -44,15 +47,6 @@ async fn main(_spawner: Spawner) { read_buffer[0], read_buffer[1], read_buffer[2] ); - let hw_channel_selection: u32 = - (1 << temp.get_hw_channel()) + (1 << vref.get_hw_channel()) + (1 << pin0.get_hw_channel()); - adc.read_in_hw_order(dma.reborrow(), hw_channel_selection, Scandir::UP, &mut read_buffer) - .await; - info!( - "DMA ADC read in hardware order: vref = {}, temp = {}, pin0 = {}.", - read_buffer[2], read_buffer[1], read_buffer[0] - ); - Timer::after_millis(2000).await; } } -- cgit