From 219de4be85f6e63e73693c934be54687c9ad860c Mon Sep 17 00:00:00 2001 From: Gerzain Mata Date: Wed, 19 Nov 2025 20:45:36 -0700 Subject: stm32: Fixed ADC4 enable() for WBA --- examples/stm32wba6/src/bin/adc.rs | 28 +++++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) (limited to 'examples') diff --git a/examples/stm32wba6/src/bin/adc.rs b/examples/stm32wba6/src/bin/adc.rs index 9d1f39419..14f4a0636 100644 --- a/examples/stm32wba6/src/bin/adc.rs +++ b/examples/stm32wba6/src/bin/adc.rs @@ -3,11 +3,37 @@ use defmt::*; use embassy_stm32::adc::{Adc, AdcChannel, SampleTime, adc4}; +use embassy_stm32::Config; +use embassy_stm32::rcc::{ + AHB5Prescaler, AHBPrescaler, APBPrescaler, PllDiv, PllMul, PllPreDiv, PllSource, Sysclk, VoltageScale, +}; use {defmt_rtt as _, panic_probe as _}; #[embassy_executor::main] async fn main(_spawner: embassy_executor::Spawner) { - let config = embassy_stm32::Config::default(); + let mut config = Config::default(); + // Fine-tune PLL1 dividers/multipliers + config.rcc.pll1 = Some(embassy_stm32::rcc::Pll { + source: PllSource::HSI, + prediv: PllPreDiv::DIV1, // PLLM = 1 → HSI / 1 = 16 MHz + mul: PllMul::MUL30, // PLLN = 30 → 16 MHz * 30 = 480 MHz VCO + divr: Some(PllDiv::DIV5), // PLLR = 5 → 96 MHz (Sysclk) + // divq: Some(PllDiv::DIV10), // PLLQ = 10 → 48 MHz (NOT USED) + divq: None, + divp: Some(PllDiv::DIV30), // PLLP = 30 → 16 MHz (USBOTG) + frac: Some(0), // Fractional part (enabled) + }); + + config.rcc.ahb_pre = AHBPrescaler::DIV1; + config.rcc.apb1_pre = APBPrescaler::DIV1; + config.rcc.apb2_pre = APBPrescaler::DIV1; + config.rcc.apb7_pre = APBPrescaler::DIV1; + config.rcc.ahb5_pre = AHB5Prescaler::DIV4; + + // voltage scale for max performance + config.rcc.voltage_scale = VoltageScale::RANGE1; + // route PLL1_P into the USB‐OTG‐HS block + config.rcc.sys = Sysclk::PLL1_R; let mut p = embassy_stm32::init(config); -- cgit From 3abc2e592f66c16ada6c475e48cde282b79d3c1f Mon Sep 17 00:00:00 2001 From: xoviat Date: Thu, 20 Nov 2025 14:27:31 -0600 Subject: adc: allow usage of anyadcchannel for adc4 --- examples/stm32u5/src/bin/adc.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'examples') diff --git a/examples/stm32u5/src/bin/adc.rs b/examples/stm32u5/src/bin/adc.rs index ad59c0bea..4d2d93aa2 100644 --- a/examples/stm32u5/src/bin/adc.rs +++ b/examples/stm32u5/src/bin/adc.rs @@ -31,7 +31,7 @@ async fn main(_spawner: embassy_executor::Spawner) { // **** ADC4 init **** let mut adc4 = Adc::new_adc4(p.ADC4); - let mut adc4_pin1 = p.PC1; // A4 + let mut adc4_pin1 = p.PC1.degrade_adc(); // A4 let mut adc4_pin2 = p.PC0; // A5 adc4.set_resolution_adc4(adc4::Resolution::BITS12); adc4.set_averaging_adc4(adc4::Averaging::Samples256); -- cgit