From e799d6c8956ed3ea5ced65d58c3065a22927ad10 Mon Sep 17 00:00:00 2001 From: James Munns Date: Fri, 14 Nov 2025 17:29:31 +0100 Subject: More work on examples --- examples/adc_interrupt.rs | 15 ++++--- examples/common/mod.rs | 38 +++++----------- examples/lpuart_buffered.rs | 5 +-- examples/ostimer_alarm.rs | 7 +-- examples/ostimer_counter.rs | 8 ++-- examples/ostimer_race_test.rs | 5 ++- examples/uart_interrupt.rs | 100 +++++++++++++++++++++--------------------- 7 files changed, 84 insertions(+), 94 deletions(-) (limited to 'examples') diff --git a/examples/adc_interrupt.rs b/examples/adc_interrupt.rs index dc82cfd30..3be85ac75 100644 --- a/examples/adc_interrupt.rs +++ b/examples/adc_interrupt.rs @@ -2,6 +2,8 @@ #![no_main] use embassy_executor::Spawner; +use embassy_mcxa276::clocks::periph_helpers::{AdcClockSel, Div4}; +use embassy_mcxa276::clocks::PoweredClock; use hal::adc::{LpadcConfig, TriggerPriorityPolicy}; use hal::uart; use mcxa_pac::adc1::cfg::{Pwrsel, Refsel}; @@ -30,10 +32,10 @@ async fn main(_spawner: Spawner) { common::init_uart2(hal::pac()); } - let src = unsafe { hal::clocks::uart2_src_hz(hal::pac()) }; - let uart = uart::Uart::::new(p.LPUART2, uart::Config::new(src)); + // let src = unsafe { hal::clocks::uart2_src_hz(hal::pac()) }; + // let uart = uart::Uart::::new(p.LPUART2, uart::Config::new(src)); - uart.write_str_blocking("\r\n=== ADC interrupt Example ===\r\n"); + // uart.write_str_blocking("\r\n=== ADC interrupt Example ===\r\n"); unsafe { common::init_adc(hal::pac()); @@ -50,6 +52,9 @@ async fn main(_spawner: Spawner) { enable_conv_pause: false, conv_pause_delay: 0, fifo_watermark: 0, + power: PoweredClock::NormalEnabledDeepSleepDisabled, + source: AdcClockSel::FroLfDiv, + div: Div4::no_div(), }; let adc = hal::adc::Adc::::new(p.ADC1, adc_config); @@ -66,7 +71,7 @@ async fn main(_spawner: Spawner) { conv_trigger_config.enable_hardware_trigger = false; adc.set_conv_trigger_config(0, &conv_trigger_config); - uart.write_str_blocking("\r\n=== ADC configuration done... ===\r\n"); + // uart.write_str_blocking("\r\n=== ADC configuration done... ===\r\n"); adc.enable_interrupt(0x1); @@ -83,7 +88,7 @@ async fn main(_spawner: Spawner) { while !adc.is_interrupt_triggered() { // Wait until the interrupt is triggered } - uart.write_str_blocking("\r\n*** ADC interrupt TRIGGERED! ***\r\n"); + // uart.write_str_blocking("\r\n*** ADC interrupt TRIGGERED! ***\r\n"); //TBD need to print the value } } diff --git a/examples/common/mod.rs b/examples/common/mod.rs index 8c52c8e86..7b197a590 100644 --- a/examples/common/mod.rs +++ b/examples/common/mod.rs @@ -1,45 +1,31 @@ //! Shared board-specific helpers for the FRDM-MCXA276 examples. //! These live with the examples so the HAL stays generic. -use hal::{clocks, pins, reset}; +use hal::{clocks, pins}; use {embassy_mcxa276 as hal, panic_probe as _}; /// Initialize clocks and pin muxing for UART2 debug console. /// Safe to call multiple times; writes are idempotent for our use. #[allow(dead_code)] -pub unsafe fn init_uart2(p: &mcxa_pac::Peripherals) { - clocks::ensure_frolf_running(p); - clocks::enable_uart2_port2(p); - reset::release_reset_port2(p); - reset::release_reset_lpuart2(p); +pub unsafe fn init_uart2(_p: &mcxa_pac::Peripherals) { + // NOTE: Lpuart has been updated to properly enable + reset its own clocks. + // GPIO has not. + _ = clocks::enable_and_reset::(&clocks::NoConfig); pins::configure_uart2_pins_port2(); - clocks::select_uart2_clock(p); } /// Initialize clocks for the LED GPIO/PORT used by the blink example. #[allow(dead_code)] -pub unsafe fn init_led(p: &mcxa_pac::Peripherals) { - clocks::enable_led_port(p); - reset::release_reset_gpio3(p); - reset::release_reset_port3(p); -} - -/// Initialize clocks for OSTIMER0 (1 MHz source). -#[allow(dead_code)] -pub unsafe fn init_ostimer0(p: &mcxa_pac::Peripherals) { - clocks::ensure_frolf_running(p); - clocks::enable_ostimer0(p); - reset::release_reset_ostimer0(p); - clocks::select_ostimer0_clock_1m(p); +pub unsafe fn init_led(_p: &mcxa_pac::Peripherals) { + _ = clocks::enable_and_reset::(&clocks::NoConfig); + _ = clocks::enable_and_reset::(&clocks::NoConfig); } /// Initialize clocks and pin muxing for ADC. #[allow(dead_code)] -pub unsafe fn init_adc(p: &mcxa_pac::Peripherals) { - clocks::ensure_frolf_running(p); - clocks::enable_adc(p); - reset::release_reset_port1(p); - reset::release_reset_adc1(p); +pub unsafe fn init_adc(_p: &mcxa_pac::Peripherals) { + // NOTE: Lpuart has been updated to properly enable + reset its own clocks. + // GPIO has not. + _ = clocks::enable_and_reset::(&clocks::NoConfig); pins::configure_adc_pins(); - clocks::select_adc_clock(p); } diff --git a/examples/lpuart_buffered.rs b/examples/lpuart_buffered.rs index 35d311143..6ae690c56 100644 --- a/examples/lpuart_buffered.rs +++ b/examples/lpuart_buffered.rs @@ -12,18 +12,17 @@ mod common; // Bind OS_EVENT for timers plus LPUART2 IRQ for the buffered driver bind_interrupts!(struct Irqs { - LPUART2 => lpuart::buffered::BufferedInterruptHandler::; + LPUART2 => lpuart::buffered::BufferedInterruptHandler::; }); // Wrapper function for the interrupt handler unsafe extern "C" fn lpuart2_handler() { - lpuart::buffered::BufferedInterruptHandler::::on_interrupt(); + lpuart::buffered::BufferedInterruptHandler::::on_interrupt(); } #[embassy_executor::main] async fn main(_spawner: Spawner) { let _p = hal::init(hal::config::Config::default()); - let p2 = lpuart::lib::init(); unsafe { hal::interrupt::install_irq_handler(mcxa_pac::Interrupt::LPUART2, lpuart2_handler); diff --git a/examples/ostimer_alarm.rs b/examples/ostimer_alarm.rs index 78ca4bbc5..4f29a2c7c 100644 --- a/examples/ostimer_alarm.rs +++ b/examples/ostimer_alarm.rs @@ -9,7 +9,7 @@ use {cortex_m, embassy_mcxa276 as hal}; mod common; -use embassy_mcxa276::bind_interrupts; +use embassy_mcxa276::{bind_interrupts, clocks::{periph_helpers::OstimerClockSel, PoweredClock}}; use {defmt_rtt as _, panic_probe as _}; // Bind only OS_EVENT, and retain the symbol explicitly so it can't be GC'ed. @@ -50,9 +50,10 @@ async fn main(_spawner: Spawner) { // Create OSTIMER instance let config = hal::ostimer::Config { init_match_max: true, - clock_frequency_hz: 1_000_000, // 1MHz + power: PoweredClock::NormalEnabledDeepSleepDisabled, + source: OstimerClockSel::Clk1M, }; - let ostimer = hal::ostimer::Ostimer::::new(p.OSTIMER0, config, hal::pac()); + let ostimer = hal::ostimer::Ostimer::::new(p.OSTIMER0, config); // Create alarm with callback let alarm = hal::ostimer::Alarm::new() diff --git a/examples/ostimer_counter.rs b/examples/ostimer_counter.rs index e95140a88..069e879d8 100644 --- a/examples/ostimer_counter.rs +++ b/examples/ostimer_counter.rs @@ -7,6 +7,7 @@ #![no_main] use embassy_executor::Spawner; +use embassy_mcxa276::clocks::{periph_helpers::OstimerClockSel, PoweredClock}; use embassy_time::{Duration, Timer}; use hal::bind_interrupts; use {defmt_rtt as _, embassy_mcxa276 as hal, panic_probe as _}; @@ -22,9 +23,6 @@ async fn main(_spawner: Spawner) { let p = hal::init(Default::default()); // Enable/clock OSTIMER0 and UART2 before touching their registers - unsafe { - common::init_ostimer0(hal::pac()); - } unsafe { common::init_uart2(hal::pac()); } @@ -44,9 +42,9 @@ async fn main(_spawner: Spawner) { p.OSTIMER0, hal::ostimer::Config { init_match_max: true, - clock_frequency_hz: 1_000_000, + power: PoweredClock::NormalEnabledDeepSleepDisabled, + source: OstimerClockSel::Clk1M, }, - hal::pac(), ); // Read initial counter value diff --git a/examples/ostimer_race_test.rs b/examples/ostimer_race_test.rs index 368a3e52f..6e3d4ac21 100644 --- a/examples/ostimer_race_test.rs +++ b/examples/ostimer_race_test.rs @@ -12,6 +12,7 @@ use core::sync::atomic::{AtomicU32, Ordering}; use embassy_executor::Spawner; +use embassy_mcxa276::clocks::{periph_helpers::OstimerClockSel, PoweredClock}; use embassy_time::{Duration, Timer}; use hal::bind_interrupts; use {defmt_rtt as _, embassy_mcxa276 as hal, panic_probe as _}; @@ -98,9 +99,9 @@ async fn main(_spawner: Spawner) { p.OSTIMER0, hal::ostimer::Config { init_match_max: true, - clock_frequency_hz: 1_000_000, + power: PoweredClock::NormalEnabledDeepSleepDisabled, + source: OstimerClockSel::Clk1M, }, - hal::pac(), ); uart.write_str_blocking("OSTIMER instance created\n"); diff --git a/examples/uart_interrupt.rs b/examples/uart_interrupt.rs index bd734f859..190a4d850 100644 --- a/examples/uart_interrupt.rs +++ b/examples/uart_interrupt.rs @@ -2,68 +2,68 @@ #![no_main] use embassy_executor::Spawner; -use embassy_mcxa276 as hal; -use hal::interrupt::typelevel::Handler; -use hal::uart; +// use embassy_mcxa276 as hal; +// use hal::interrupt::typelevel::Handler; +// use hal::uart; -mod common; +// mod common; -use embassy_mcxa276::bind_interrupts; -use {defmt_rtt as _, panic_probe as _}; +// use embassy_mcxa276::bind_interrupts; +// use {defmt_rtt as _, panic_probe as _}; -// Bind LPUART2 interrupt to our handler -bind_interrupts!(struct Irqs { - LPUART2 => hal::uart::UartInterruptHandler; -}); +// // Bind LPUART2 interrupt to our handler +// bind_interrupts!(struct Irqs { +// LPUART2 => hal::uart::UartInterruptHandler; +// }); -#[used] -#[no_mangle] -static KEEP_LPUART2: unsafe extern "C" fn() = LPUART2; +// #[used] +// #[no_mangle] +// static KEEP_LPUART2: unsafe extern "C" fn() = LPUART2; -// Wrapper function for the interrupt handler -unsafe extern "C" fn lpuart2_handler() { - hal::uart::UartInterruptHandler::on_interrupt(); -} +// // Wrapper function for the interrupt handler +// unsafe extern "C" fn lpuart2_handler() { +// hal::uart::UartInterruptHandler::on_interrupt(); +// } #[embassy_executor::main] async fn main(_spawner: Spawner) { - let _p = hal::init(hal::config::Config::default()); +// let _p = hal::init(hal::config::Config::default()); - // Enable/clock UART2 before touching its registers - unsafe { - common::init_uart2(hal::pac()); - } - let src = unsafe { hal::clocks::uart2_src_hz(hal::pac()) }; - let uart = uart::Uart::::new(_p.LPUART2, uart::Config::new(src)); +// // Enable/clock UART2 before touching its registers +// unsafe { +// common::init_uart2(hal::pac()); +// } +// let src = unsafe { hal::clocks::uart2_src_hz(hal::pac()) }; +// let uart = uart::Uart::::new(_p.LPUART2, uart::Config::new(src)); - // Configure LPUART2 interrupt for UART operation BEFORE any UART usage - hal::interrupt::LPUART2.configure_for_uart(hal::interrupt::Priority::from(3)); +// // Configure LPUART2 interrupt for UART operation BEFORE any UART usage +// hal::interrupt::LPUART2.configure_for_uart(hal::interrupt::Priority::from(3)); - // Manually install the interrupt handler and enable RX IRQs in the peripheral - unsafe { - hal::interrupt::LPUART2.install_handler(lpuart2_handler); - // Enable RX interrupts so the handler actually fires on incoming bytes - uart.enable_rx_interrupts(); - } +// // Manually install the interrupt handler and enable RX IRQs in the peripheral +// unsafe { +// hal::interrupt::LPUART2.install_handler(lpuart2_handler); +// // Enable RX interrupts so the handler actually fires on incoming bytes +// uart.enable_rx_interrupts(); +// } - // Print welcome message - uart.write_str_blocking("UART interrupt echo demo starting...\r\n"); - uart.write_str_blocking("Type characters to echo them back.\r\n"); +// // Print welcome message +// uart.write_str_blocking("UART interrupt echo demo starting...\r\n"); +// uart.write_str_blocking("Type characters to echo them back.\r\n"); - // Log using defmt if enabled - defmt::info!("UART interrupt echo demo starting..."); +// // Log using defmt if enabled +// defmt::info!("UART interrupt echo demo starting..."); - loop { - // Check if we have received any data - if uart.rx_data_available() { - if let Some(byte) = uart.try_read_byte() { - // Echo it back - uart.write_byte(byte); - uart.write_str_blocking(" (received)\r\n"); - } - } else { - // No data available, wait a bit before checking again - cortex_m::asm::delay(12_000_000); // ~1 second at 12MHz - } - } +// loop { +// // Check if we have received any data +// if uart.rx_data_available() { +// if let Some(byte) = uart.try_read_byte() { +// // Echo it back +// uart.write_byte(byte); +// uart.write_str_blocking(" (received)\r\n"); +// } +// } else { +// // No data available, wait a bit before checking again +// cortex_m::asm::delay(12_000_000); // ~1 second at 12MHz +// } +// } } -- cgit