From bf4cbd75779b230e9e33a9d2a849f67335a68cf9 Mon Sep 17 00:00:00 2001
From: Caleb Garrett <47389035+caleb-garrett@users.noreply.github.com>
Date: Thu, 22 Feb 2024 15:47:36 -0500
Subject: Add CRYP example.

---
 examples/stm32f7/Cargo.toml      |  1 +
 examples/stm32f7/src/bin/cryp.rs | 69 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 70 insertions(+)
 create mode 100644 examples/stm32f7/src/bin/cryp.rs

(limited to 'examples')

diff --git a/examples/stm32f7/Cargo.toml b/examples/stm32f7/Cargo.toml
index 736e81723..305816a2b 100644
--- a/examples/stm32f7/Cargo.toml
+++ b/examples/stm32f7/Cargo.toml
@@ -30,6 +30,7 @@ embedded-storage = "0.3.1"
 static_cell = "2"
 sha2 = { version = "0.10.8", default-features = false }
 hmac = "0.12.1"
+aes-gcm = {version = "0.10.3", default-features = false, features = ["aes", "heapless"] }
 
 [profile.release]
 debug = 2
diff --git a/examples/stm32f7/src/bin/cryp.rs b/examples/stm32f7/src/bin/cryp.rs
new file mode 100644
index 000000000..c1b80ddc3
--- /dev/null
+++ b/examples/stm32f7/src/bin/cryp.rs
@@ -0,0 +1,69 @@
+#![no_std]
+#![no_main]
+
+use aes_gcm::{
+    aead::{heapless::Vec, AeadInPlace, KeyInit},
+    Aes128Gcm,
+};
+use defmt::info;
+use embassy_executor::Spawner;
+use embassy_stm32::cryp::*;
+use embassy_stm32::Config;
+use embassy_time::Instant;
+use {defmt_rtt as _, panic_probe as _};
+
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) -> ! {
+    let config = Config::default();
+    let p = embassy_stm32::init(config);
+
+    let payload: &[u8] = b"hello world";
+    let aad: &[u8] = b"additional data";
+
+    let hw_cryp = Cryp::new(p.CRYP);
+    let key: [u8; 16] = [0; 16];
+    let mut ciphertext: [u8; 11] = [0; 11];
+    let mut plaintext: [u8; 11] = [0; 11];
+    let iv: [u8; 12] = [0; 12];
+
+    let hw_start_time = Instant::now();
+
+    // Encrypt in hardware using AES-GCM 128-bit
+    let aes_gcm = AesGcm::new(&key, &iv);
+    let mut gcm_encrypt = hw_cryp.start(&aes_gcm, Direction::Encrypt);
+    hw_cryp.aad_blocking(&mut gcm_encrypt, aad, true);
+    hw_cryp.payload_blocking(&mut gcm_encrypt, payload, &mut ciphertext, true);
+    let encrypt_tag = hw_cryp.finish_blocking(gcm_encrypt);
+
+    // Decrypt in hardware using AES-GCM 128-bit
+    let mut gcm_decrypt = hw_cryp.start(&aes_gcm, Direction::Decrypt);
+    hw_cryp.aad_blocking(&mut gcm_decrypt, aad, true);
+    hw_cryp.payload_blocking(&mut gcm_decrypt, &ciphertext, &mut plaintext, true);
+    let decrypt_tag = hw_cryp.finish_blocking(gcm_decrypt);
+
+    let hw_end_time = Instant::now();
+    let hw_execution_time = hw_end_time - hw_start_time;
+
+    info!("AES-GCM Ciphertext: {:?}", ciphertext);
+    info!("AES-GCM Plaintext: {:?}", plaintext);
+    assert_eq!(payload, plaintext);
+    assert_eq!(encrypt_tag, decrypt_tag);
+
+    let sw_start_time = Instant::now();
+
+    //Encrypt in software using AES-GCM 128-bit
+    let mut payload_vec: Vec<u8, 32> = Vec::from_slice(&payload).unwrap();
+    let cipher = Aes128Gcm::new(&key.into());
+    let _ = cipher.encrypt_in_place(&iv.into(), aad.into(), &mut payload_vec);
+
+    //Decrypt in software using AES-GCM 128-bit
+    let _ = cipher.encrypt_in_place(&iv.into(), aad.into(), &mut payload_vec);
+
+    let sw_end_time = Instant::now();
+    let sw_execution_time = sw_end_time - sw_start_time;
+
+    info!("Hardware Execution Time: {:?}", hw_execution_time);
+    info!("Software Execution Time: {:?}", sw_execution_time);
+
+    loop {}
+}
-- 
cgit 


From 967b4927b002dbcdcfbe968bf9c15014fc1de2a0 Mon Sep 17 00:00:00 2001
From: Caleb Garrett <47389035+caleb-garrett@users.noreply.github.com>
Date: Fri, 23 Feb 2024 16:05:18 -0500
Subject: Correct tag generation.

---
 examples/stm32f7/src/bin/cryp.rs | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

(limited to 'examples')

diff --git a/examples/stm32f7/src/bin/cryp.rs b/examples/stm32f7/src/bin/cryp.rs
index c1b80ddc3..be41955c5 100644
--- a/examples/stm32f7/src/bin/cryp.rs
+++ b/examples/stm32f7/src/bin/cryp.rs
@@ -51,13 +51,16 @@ async fn main(_spawner: Spawner) -> ! {
 
     let sw_start_time = Instant::now();
 
-    //Encrypt in software using AES-GCM 128-bit
+    // Encrypt in software using AES-GCM 128-bit
     let mut payload_vec: Vec<u8, 32> = Vec::from_slice(&payload).unwrap();
     let cipher = Aes128Gcm::new(&key.into());
     let _ = cipher.encrypt_in_place(&iv.into(), aad.into(), &mut payload_vec);
+    
+    assert_eq!(ciphertext, payload_vec[0..ciphertext.len()]);
+    assert_eq!(encrypt_tag, payload_vec[ciphertext.len()..ciphertext.len() + encrypt_tag.len()]);
 
-    //Decrypt in software using AES-GCM 128-bit
-    let _ = cipher.encrypt_in_place(&iv.into(), aad.into(), &mut payload_vec);
+    // Decrypt in software using AES-GCM 128-bit
+    let _ = cipher.decrypt_in_place(&iv.into(), aad.into(), &mut payload_vec);
 
     let sw_end_time = Instant::now();
     let sw_execution_time = sw_end_time - sw_start_time;
-- 
cgit 


From f352b6d68b17fee886af58494b7e793cea3ea383 Mon Sep 17 00:00:00 2001
From: Caleb Garrett <47389035+caleb-garrett@users.noreply.github.com>
Date: Sat, 24 Feb 2024 16:14:44 -0500
Subject: Address CI build issues.

---
 examples/stm32f7/src/bin/cryp.rs | 14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)

(limited to 'examples')

diff --git a/examples/stm32f7/src/bin/cryp.rs b/examples/stm32f7/src/bin/cryp.rs
index be41955c5..04927841a 100644
--- a/examples/stm32f7/src/bin/cryp.rs
+++ b/examples/stm32f7/src/bin/cryp.rs
@@ -1,10 +1,9 @@
 #![no_std]
 #![no_main]
 
-use aes_gcm::{
-    aead::{heapless::Vec, AeadInPlace, KeyInit},
-    Aes128Gcm,
-};
+use aes_gcm::aead::heapless::Vec;
+use aes_gcm::aead::{AeadInPlace, KeyInit};
+use aes_gcm::Aes128Gcm;
 use defmt::info;
 use embassy_executor::Spawner;
 use embassy_stm32::cryp::*;
@@ -55,9 +54,12 @@ async fn main(_spawner: Spawner) -> ! {
     let mut payload_vec: Vec<u8, 32> = Vec::from_slice(&payload).unwrap();
     let cipher = Aes128Gcm::new(&key.into());
     let _ = cipher.encrypt_in_place(&iv.into(), aad.into(), &mut payload_vec);
-    
+
     assert_eq!(ciphertext, payload_vec[0..ciphertext.len()]);
-    assert_eq!(encrypt_tag, payload_vec[ciphertext.len()..ciphertext.len() + encrypt_tag.len()]);
+    assert_eq!(
+        encrypt_tag,
+        payload_vec[ciphertext.len()..ciphertext.len() + encrypt_tag.len()]
+    );
 
     // Decrypt in software using AES-GCM 128-bit
     let _ = cipher.decrypt_in_place(&iv.into(), aad.into(), &mut payload_vec);
-- 
cgit 


From 95234cddbac6f21fce0f5df510d49816f343b87d Mon Sep 17 00:00:00 2001
From: Dario Nieuwenhuis <dirbaio@dirbaio.net>
Date: Mon, 26 Feb 2024 03:28:27 +0100
Subject: stm32: autogenerate mux config for all chips.

---
 examples/stm32f334/src/bin/pwm.rs      |  2 +-
 examples/stm32g0/src/bin/hf_timer.rs   | 44 ++++++++++++++----------------
 examples/stm32g0/src/bin/usb_serial.rs | 10 +++----
 examples/stm32g4/src/bin/adc.rs        | 29 ++++++++++----------
 examples/stm32g4/src/bin/can.rs        | 21 ++++++++++++--
 examples/stm32g4/src/bin/pll.rs        |  1 +
 examples/stm32g4/src/bin/usb_serial.rs | 50 ++++++++++++----------------------
 examples/stm32h5/src/bin/can.rs        |  2 +-
 examples/stm32h5/src/bin/usb_serial.rs |  7 ++---
 examples/stm32h7/src/bin/adc.rs        |  2 +-
 examples/stm32h7/src/bin/can.rs        |  2 +-
 examples/stm32h7/src/bin/dac.rs        |  2 +-
 examples/stm32h7/src/bin/dac_dma.rs    |  2 +-
 examples/stm32l4/src/bin/adc.rs        | 14 +++++-----
 14 files changed, 93 insertions(+), 95 deletions(-)

(limited to 'examples')

diff --git a/examples/stm32f334/src/bin/pwm.rs b/examples/stm32f334/src/bin/pwm.rs
index 7c6d6cd71..e6d1a6c02 100644
--- a/examples/stm32f334/src/bin/pwm.rs
+++ b/examples/stm32f334/src/bin/pwm.rs
@@ -28,7 +28,7 @@ async fn main(_spawner: Spawner) {
         config.rcc.apb1_pre = APBPrescaler::DIV2;
         config.rcc.apb2_pre = APBPrescaler::DIV1;
 
-        config.rcc.mux.hrtim1sw = Some(embassy_stm32::rcc::mux::Timsw::PLL1_P);
+        config.rcc.mux.hrtim1sw = embassy_stm32::rcc::mux::Timsw::PLL1_P;
     }
     let p = embassy_stm32::init(config);
 
diff --git a/examples/stm32g0/src/bin/hf_timer.rs b/examples/stm32g0/src/bin/hf_timer.rs
index 3f63d0dfd..647ff0419 100644
--- a/examples/stm32g0/src/bin/hf_timer.rs
+++ b/examples/stm32g0/src/bin/hf_timer.rs
@@ -4,37 +4,35 @@
 use defmt::info;
 use embassy_executor::Spawner;
 use embassy_stm32::gpio::OutputType;
-use embassy_stm32::pac::rcc::vals::Tim1sel;
-use embassy_stm32::rcc::{Config as RccConfig, PllConfig, PllSource, Pllm, Plln, Pllq, Pllr, Sysclk};
 use embassy_stm32::time::khz;
 use embassy_stm32::timer::complementary_pwm::{ComplementaryPwm, ComplementaryPwmPin};
 use embassy_stm32::timer::simple_pwm::PwmPin;
 use embassy_stm32::timer::Channel;
-use embassy_stm32::{pac, Config as PeripheralConfig};
+use embassy_stm32::Config as PeripheralConfig;
 use {defmt_rtt as _, panic_probe as _};
 
 #[embassy_executor::main]
 async fn main(_spawner: Spawner) {
-    let mut rcc_config = RccConfig::default();
-    rcc_config.sys = Sysclk::PLL(PllConfig {
-        source: PllSource::HSI,
-        m: Pllm::DIV1,
-        n: Plln::MUL16,
-        r: Pllr::DIV4,       // CPU clock comes from PLLR (HSI (16MHz) / 1 * 16 / 4 = 64MHz)
-        q: Some(Pllq::DIV2), // TIM1 or TIM15 can be sourced from PLLQ (HSI (16MHz) / 1 * 16 / 2 = 128MHz)
-        p: None,
-    });
-
-    let mut peripheral_config = PeripheralConfig::default();
-    peripheral_config.rcc = rcc_config;
-
-    let p = embassy_stm32::init(peripheral_config);
-
-    // configure TIM1 mux to select PLLQ as clock source
-    // https://www.st.com/resource/en/reference_manual/rm0444-stm32g0x1-advanced-armbased-32bit-mcus-stmicroelectronics.pdf
-    // RM0444 page 210
-    // RCC - Peripherals Independent Clock Control Register - bit 22 -> 1
-    pac::RCC.ccipr().modify(|w| w.set_tim1sel(Tim1sel::PLL1_Q));
+    let mut config = PeripheralConfig::default();
+    {
+        use embassy_stm32::rcc::*;
+
+        config.rcc.sys = Sysclk::PLL(PllConfig {
+            source: PllSource::HSI,
+            m: Pllm::DIV1,
+            n: Plln::MUL16,
+            r: Pllr::DIV4,       // CPU clock comes from PLLR (HSI (16MHz) / 1 * 16 / 4 = 64MHz)
+            q: Some(Pllq::DIV2), // TIM1 or TIM15 can be sourced from PLLQ (HSI (16MHz) / 1 * 16 / 2 = 128MHz)
+            p: None,
+        });
+
+        // configure TIM1 mux to select PLLQ as clock source
+        // https://www.st.com/resource/en/reference_manual/rm0444-stm32g0x1-advanced-armbased-32bit-mcus-stmicroelectronics.pdf
+        // RM0444 page 210
+        // RCC - Peripherals Independent Clock Control Register - bit 22 -> 1
+        config.rcc.mux.tim1sel = embassy_stm32::rcc::mux::Tim1sel::PLL1_Q;
+    }
+    let p = embassy_stm32::init(config);
 
     let ch1 = PwmPin::new_ch1(p.PA8, OutputType::PushPull);
     let ch1n = ComplementaryPwmPin::new_ch1(p.PA7, OutputType::PushPull);
diff --git a/examples/stm32g0/src/bin/usb_serial.rs b/examples/stm32g0/src/bin/usb_serial.rs
index f5aaa5624..8b9915626 100644
--- a/examples/stm32g0/src/bin/usb_serial.rs
+++ b/examples/stm32g0/src/bin/usb_serial.rs
@@ -4,7 +4,6 @@
 use defmt::{panic, *};
 use embassy_executor::Spawner;
 use embassy_futures::join::join;
-use embassy_stm32::rcc::{Hsi48Config, UsbSrc};
 use embassy_stm32::usb::{Driver, Instance};
 use embassy_stm32::{bind_interrupts, peripherals, usb, Config};
 use embassy_usb::class::cdc_acm::{CdcAcmClass, State};
@@ -19,10 +18,11 @@ bind_interrupts!(struct Irqs {
 #[embassy_executor::main]
 async fn main(_spawner: Spawner) {
     let mut config = Config::default();
-    config.rcc.usb_src = Some(UsbSrc::Hsi48(Hsi48Config {
-        sync_from_usb: true,
-        ..Default::default()
-    }));
+    {
+        use embassy_stm32::rcc::*;
+        config.rcc.hsi48 = Some(Hsi48Config { sync_from_usb: true });
+        config.rcc.mux.usbsel = mux::Usbsel::HSI48;
+    }
     let p = embassy_stm32::init(config);
 
     info!("Hello World!");
diff --git a/examples/stm32g4/src/bin/adc.rs b/examples/stm32g4/src/bin/adc.rs
index 6c6de1ffe..f81335f93 100644
--- a/examples/stm32g4/src/bin/adc.rs
+++ b/examples/stm32g4/src/bin/adc.rs
@@ -4,7 +4,6 @@
 use defmt::*;
 use embassy_executor::Spawner;
 use embassy_stm32::adc::{Adc, SampleTime};
-use embassy_stm32::rcc::{AdcClockSource, Pll, PllMul, PllPreDiv, PllRDiv, Pllsrc, Sysclk};
 use embassy_stm32::Config;
 use embassy_time::{Delay, Timer};
 use {defmt_rtt as _, panic_probe as _};
@@ -12,20 +11,20 @@ use {defmt_rtt as _, panic_probe as _};
 #[embassy_executor::main]
 async fn main(_spawner: Spawner) {
     let mut config = Config::default();
-
-    config.rcc.pll = Some(Pll {
-        source: Pllsrc::HSI,
-        prediv: PllPreDiv::DIV4,
-        mul: PllMul::MUL85,
-        divp: None,
-        divq: None,
-        // Main system clock at 170 MHz
-        divr: Some(PllRDiv::DIV2),
-    });
-
-    config.rcc.adc12_clock_source = AdcClockSource::SYS;
-    config.rcc.sys = Sysclk::PLL1_R;
-
+    {
+        use embassy_stm32::rcc::*;
+        config.rcc.pll = Some(Pll {
+            source: Pllsrc::HSI,
+            prediv: PllPreDiv::DIV4,
+            mul: PllMul::MUL85,
+            divp: None,
+            divq: None,
+            // Main system clock at 170 MHz
+            divr: Some(PllRDiv::DIV2),
+        });
+        config.rcc.mux.adc12sel = mux::Adcsel::SYS;
+        config.rcc.sys = Sysclk::PLL1_R;
+    }
     let mut p = embassy_stm32::init(config);
     info!("Hello World!");
 
diff --git a/examples/stm32g4/src/bin/can.rs b/examples/stm32g4/src/bin/can.rs
index a41f765c1..7551b2a55 100644
--- a/examples/stm32g4/src/bin/can.rs
+++ b/examples/stm32g4/src/bin/can.rs
@@ -3,6 +3,7 @@
 use defmt::*;
 use embassy_executor::Spawner;
 use embassy_stm32::peripherals::*;
+use embassy_stm32::time::Hertz;
 use embassy_stm32::{bind_interrupts, can, Config};
 use embassy_time::Timer;
 use static_cell::StaticCell;
@@ -15,8 +16,24 @@ bind_interrupts!(struct Irqs {
 
 #[embassy_executor::main]
 async fn main(_spawner: Spawner) {
-    let config = Config::default();
-
+    let mut config = Config::default();
+    {
+        use embassy_stm32::rcc::*;
+        config.rcc.hse = Some(Hse {
+            freq: Hertz(24_000_000),
+            mode: HseMode::Oscillator,
+        });
+        config.rcc.pll = Some(Pll {
+            source: Pllsrc::HSE,
+            prediv: PllPreDiv::DIV6,
+            mul: PllMul::MUL85,
+            divp: None,
+            divq: Some(PllQDiv::DIV8), // 42.5 Mhz for fdcan.
+            divr: Some(PllRDiv::DIV2), // Main system clock at 170 MHz
+        });
+        config.rcc.mux.fdcansel = mux::Fdcansel::PLL1_Q;
+        config.rcc.sys = Sysclk::PLL1_R;
+    }
     let peripherals = embassy_stm32::init(config);
 
     let mut can = can::FdcanConfigurator::new(peripherals.FDCAN1, peripherals.PA11, peripherals.PA12, Irqs);
diff --git a/examples/stm32g4/src/bin/pll.rs b/examples/stm32g4/src/bin/pll.rs
index 5274de79d..2609abfa2 100644
--- a/examples/stm32g4/src/bin/pll.rs
+++ b/examples/stm32g4/src/bin/pll.rs
@@ -12,6 +12,7 @@ use {defmt_rtt as _, panic_probe as _};
 async fn main(_spawner: Spawner) {
     let mut config = Config::default();
 
+    config.rcc.hsi = true;
     config.rcc.pll = Some(Pll {
         source: Pllsrc::HSI,
         prediv: PllPreDiv::DIV4,
diff --git a/examples/stm32g4/src/bin/usb_serial.rs b/examples/stm32g4/src/bin/usb_serial.rs
index 989fef5b0..90caaae14 100644
--- a/examples/stm32g4/src/bin/usb_serial.rs
+++ b/examples/stm32g4/src/bin/usb_serial.rs
@@ -3,9 +3,6 @@
 
 use defmt::{panic, *};
 use embassy_executor::Spawner;
-use embassy_stm32::rcc::{
-    Clk48Src, Hse, HseMode, Hsi48Config, Pll, PllMul, PllPreDiv, PllQDiv, PllRDiv, Pllsrc, Sysclk,
-};
 use embassy_stm32::time::Hertz;
 use embassy_stm32::usb::{self, Driver, Instance};
 use embassy_stm32::{bind_interrupts, peripherals, Config};
@@ -22,38 +19,27 @@ bind_interrupts!(struct Irqs {
 #[embassy_executor::main]
 async fn main(_spawner: Spawner) {
     let mut config = Config::default();
-
-    // Change this to `false` to use the HSE clock source for the USB. This example assumes an 8MHz HSE.
-    const USE_HSI48: bool = true;
-
-    let plldivq = if USE_HSI48 { None } else { Some(PllQDiv::DIV6) };
-
-    config.rcc.hse = Some(Hse {
-        freq: Hertz(8_000_000),
-        mode: HseMode::Oscillator,
-    });
-
-    config.rcc.pll = Some(Pll {
-        source: Pllsrc::HSE,
-        prediv: PllPreDiv::DIV2,
-        mul: PllMul::MUL72,
-        divp: None,
-        divq: plldivq,
-        // Main system clock at 144 MHz
-        divr: Some(PllRDiv::DIV2),
-    });
-
-    config.rcc.sys = Sysclk::PLL1_R;
-    config.rcc.boost = true; // BOOST!
-
-    if USE_HSI48 {
+    {
+        use embassy_stm32::rcc::*;
         // Sets up the Clock Recovery System (CRS) to use the USB SOF to trim the HSI48 oscillator.
         config.rcc.hsi48 = Some(Hsi48Config { sync_from_usb: true });
-        config.rcc.clk48_src = Clk48Src::HSI48;
-    } else {
-        config.rcc.clk48_src = Clk48Src::PLL1_Q;
+        config.rcc.hse = Some(Hse {
+            freq: Hertz(8_000_000),
+            mode: HseMode::Oscillator,
+        });
+        config.rcc.pll = Some(Pll {
+            source: Pllsrc::HSE,
+            prediv: PllPreDiv::DIV2,
+            mul: PllMul::MUL72,
+            divp: None,
+            divq: Some(PllQDiv::DIV6), // 48mhz
+            divr: Some(PllRDiv::DIV2), // Main system clock at 144 MHz
+        });
+        config.rcc.sys = Sysclk::PLL1_R;
+        config.rcc.boost = true; // BOOST!
+        config.rcc.mux.clk48sel = mux::Clk48sel::HSI48;
+        //config.rcc.mux.clk48sel = mux::Clk48sel::PLL1_Q; // uncomment to use PLL1_Q instead.
     }
-
     let p = embassy_stm32::init(config);
 
     info!("Hello World!");
diff --git a/examples/stm32h5/src/bin/can.rs b/examples/stm32h5/src/bin/can.rs
index e5ccfe4f7..643df27f9 100644
--- a/examples/stm32h5/src/bin/can.rs
+++ b/examples/stm32h5/src/bin/can.rs
@@ -20,7 +20,7 @@ async fn main(_spawner: Spawner) {
         freq: embassy_stm32::time::Hertz(25_000_000),
         mode: rcc::HseMode::Oscillator,
     });
-    config.rcc.fdcan_clock_source = rcc::FdCanClockSource::HSE;
+    config.rcc.mux.fdcan12sel = rcc::mux::Fdcansel::HSE;
 
     let peripherals = embassy_stm32::init(config);
 
diff --git a/examples/stm32h5/src/bin/usb_serial.rs b/examples/stm32h5/src/bin/usb_serial.rs
index 208493d8c..83477c8fa 100644
--- a/examples/stm32h5/src/bin/usb_serial.rs
+++ b/examples/stm32h5/src/bin/usb_serial.rs
@@ -5,7 +5,7 @@ use defmt::{panic, *};
 use embassy_executor::Spawner;
 use embassy_stm32::time::Hertz;
 use embassy_stm32::usb::{Driver, Instance};
-use embassy_stm32::{bind_interrupts, pac, peripherals, usb, Config};
+use embassy_stm32::{bind_interrupts, peripherals, usb, Config};
 use embassy_usb::class::cdc_acm::{CdcAcmClass, State};
 use embassy_usb::driver::EndpointError;
 use embassy_usb::Builder;
@@ -41,15 +41,12 @@ async fn main(_spawner: Spawner) {
         config.rcc.apb3_pre = APBPrescaler::DIV4;
         config.rcc.sys = Sysclk::PLL1_P;
         config.rcc.voltage_scale = VoltageScale::Scale0;
+        config.rcc.mux.usbsel = mux::Usbsel::HSI48;
     }
     let p = embassy_stm32::init(config);
 
     info!("Hello World!");
 
-    pac::RCC.ccipr4().write(|w| {
-        w.set_usbsel(pac::rcc::vals::Usbsel::HSI48);
-    });
-
     // Create the driver, from the HAL.
     let driver = Driver::new(p.USB, Irqs, p.PA12, p.PA11);
 
diff --git a/examples/stm32h7/src/bin/adc.rs b/examples/stm32h7/src/bin/adc.rs
index f0278239f..a5594d10c 100644
--- a/examples/stm32h7/src/bin/adc.rs
+++ b/examples/stm32h7/src/bin/adc.rs
@@ -38,7 +38,7 @@ async fn main(_spawner: Spawner) {
         config.rcc.apb3_pre = APBPrescaler::DIV2; // 100 Mhz
         config.rcc.apb4_pre = APBPrescaler::DIV2; // 100 Mhz
         config.rcc.voltage_scale = VoltageScale::Scale1;
-        config.rcc.adc_clock_source = AdcClockSource::PLL2_P;
+        config.rcc.mux.adcsel = mux::Adcsel::PLL2_P;
     }
     let mut p = embassy_stm32::init(config);
 
diff --git a/examples/stm32h7/src/bin/can.rs b/examples/stm32h7/src/bin/can.rs
index e5ccfe4f7..13a6a5051 100644
--- a/examples/stm32h7/src/bin/can.rs
+++ b/examples/stm32h7/src/bin/can.rs
@@ -20,7 +20,7 @@ async fn main(_spawner: Spawner) {
         freq: embassy_stm32::time::Hertz(25_000_000),
         mode: rcc::HseMode::Oscillator,
     });
-    config.rcc.fdcan_clock_source = rcc::FdCanClockSource::HSE;
+    config.rcc.mux.fdcansel = rcc::mux::Fdcansel::HSE;
 
     let peripherals = embassy_stm32::init(config);
 
diff --git a/examples/stm32h7/src/bin/dac.rs b/examples/stm32h7/src/bin/dac.rs
index a9bf46de0..a6f969aba 100644
--- a/examples/stm32h7/src/bin/dac.rs
+++ b/examples/stm32h7/src/bin/dac.rs
@@ -40,7 +40,7 @@ fn main() -> ! {
         config.rcc.apb3_pre = APBPrescaler::DIV2; // 100 Mhz
         config.rcc.apb4_pre = APBPrescaler::DIV2; // 100 Mhz
         config.rcc.voltage_scale = VoltageScale::Scale1;
-        config.rcc.adc_clock_source = AdcClockSource::PLL2_P;
+        config.rcc.mux.adcsel = mux::Adcsel::PLL2_P;
     }
     let p = embassy_stm32::init(config);
 
diff --git a/examples/stm32h7/src/bin/dac_dma.rs b/examples/stm32h7/src/bin/dac_dma.rs
index d88bd838f..feec28993 100644
--- a/examples/stm32h7/src/bin/dac_dma.rs
+++ b/examples/stm32h7/src/bin/dac_dma.rs
@@ -42,7 +42,7 @@ async fn main(spawner: Spawner) {
         config.rcc.apb3_pre = APBPrescaler::DIV2; // 100 Mhz
         config.rcc.apb4_pre = APBPrescaler::DIV2; // 100 Mhz
         config.rcc.voltage_scale = VoltageScale::Scale1;
-        config.rcc.adc_clock_source = AdcClockSource::PLL2_P;
+        config.rcc.mux.adcsel = mux::Adcsel::PLL2_P;
     }
 
     // Initialize the board and obtain a Peripherals instance
diff --git a/examples/stm32l4/src/bin/adc.rs b/examples/stm32l4/src/bin/adc.rs
index 910944673..a9f4604aa 100644
--- a/examples/stm32l4/src/bin/adc.rs
+++ b/examples/stm32l4/src/bin/adc.rs
@@ -3,7 +3,7 @@
 
 use defmt::*;
 use embassy_stm32::adc::{Adc, Resolution};
-use embassy_stm32::pac;
+use embassy_stm32::Config;
 use embassy_time::Delay;
 use {defmt_rtt as _, panic_probe as _};
 
@@ -11,12 +11,12 @@ use {defmt_rtt as _, panic_probe as _};
 fn main() -> ! {
     info!("Hello World!");
 
-    pac::RCC.ccipr().modify(|w| {
-        w.set_adcsel(pac::rcc::vals::Adcsel::SYS);
-    });
-    pac::RCC.ahb2enr().modify(|w| w.set_adcen(true));
-
-    let p = embassy_stm32::init(Default::default());
+    let mut config = Config::default();
+    {
+        use embassy_stm32::rcc::*;
+        config.rcc.mux.adcsel = mux::Adcsel::SYS;
+    }
+    let p = embassy_stm32::init(config);
 
     let mut adc = Adc::new(p.ADC1, &mut Delay);
     //adc.enable_vref();
-- 
cgit 


From df8f508ffa2bec79f6e3fba4ac3cfe0e5545b5b2 Mon Sep 17 00:00:00 2001
From: Corey Schuhen <cschuhen@gmail.com>
Date: Sat, 2 Mar 2024 09:00:54 +1000
Subject: Writing to TX buffer also needs to fire an interrupt to kick off
 transmission if it is idle.

Formatting
---
 examples/stm32g4/src/bin/can.rs | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

(limited to 'examples')

diff --git a/examples/stm32g4/src/bin/can.rs b/examples/stm32g4/src/bin/can.rs
index a41f765c1..11e96361e 100644
--- a/examples/stm32g4/src/bin/can.rs
+++ b/examples/stm32g4/src/bin/can.rs
@@ -184,7 +184,11 @@ async fn main(_spawner: Spawner) {
             let frame = can::frame::ClassicFrame::new_extended(0x123456F, &[i; 8]).unwrap();
             info!("Writing frame");
 
-            _ = can.write(frame).await;
+            // You can use any of these approaches to send. The writer makes it
+            // easy to share sending from multiple tasks.
+            //_ = can.write(frame).await;
+            //can.writer().try_write(frame).unwrap();
+            can.writer().write(frame).await;
 
             match can.read().await {
                 Ok((rx_frame, ts)) => {
-- 
cgit