From 357a538e8d5f69c8c0aeacfd416f1ad99b0907d3 Mon Sep 17 00:00:00 2001 From: James Munns Date: Thu, 13 Nov 2025 17:50:11 +0100 Subject: autofix clippy lints --- src/adc.rs | 4 ++-- src/lpuart/buffered.rs | 22 +++++++++++++--------- src/lpuart/mod.rs | 18 +++++++----------- src/ostimer.rs | 6 ++++++ src/rtc.rs | 4 ++-- src/uart.rs | 8 +++++++- 6 files changed, 37 insertions(+), 25 deletions(-) (limited to 'src') diff --git a/src/adc.rs b/src/adc.rs index d456971f7..655bf934f 100644 --- a/src/adc.rs +++ b/src/adc.rs @@ -228,7 +228,7 @@ impl Adc { let step = 1.0 / (1u32 << shift) as f32; let tmp = (gain_adjustment / step) as u32; gcra_array[i - 1] = tmp; - gain_adjustment = gain_adjustment - tmp as f32 * step; + gain_adjustment -= tmp as f32 * step; } for i in (1..=17).rev() { @@ -244,7 +244,7 @@ impl Adc { while adc.gcc0().read().rdy().is_gain_cal_not_valid() {} let mut gcca = adc.gcc0().read().gain_cal().bits() as u32; - if gcca & (((0xFFFF >> 0) + 1) >> 1) != 0 { + if gcca & ((0xFFFF + 1) >> 1) != 0 { gcca |= !0xFFFF; } diff --git a/src/lpuart/buffered.rs b/src/lpuart/buffered.rs index 0413fed8e..21b86ada9 100644 --- a/src/lpuart/buffered.rs +++ b/src/lpuart/buffered.rs @@ -24,6 +24,12 @@ pub struct State { initialized: AtomicBool, } +impl Default for State { + fn default() -> Self { + Self::new() + } +} + impl State { /// Create a new state instance pub const fn new() -> Self { @@ -612,16 +618,14 @@ impl crate::interrupt::typelevel::Handler for Buffere } // Handle transmission complete - if ctrl.tcie().is_enabled() { - if regs.stat().read().tc().is_complete() { - state.tx_done.store(true, Ordering::Release); - state.tx_waker.wake(); + if ctrl.tcie().is_enabled() && regs.stat().read().tc().is_complete() { + state.tx_done.store(true, Ordering::Release); + state.tx_waker.wake(); - // Disable TC interrupt - cortex_m::interrupt::free(|_| { - regs.ctrl().modify(|_, w| w.tcie().disabled()); - }); - } + // Disable TC interrupt + cortex_m::interrupt::free(|_| { + regs.ctrl().modify(|_, w| w.tcie().disabled()); + }); } } } diff --git a/src/lpuart/mod.rs b/src/lpuart/mod.rs index bed10bdb0..854136144 100644 --- a/src/lpuart/mod.rs +++ b/src/lpuart/mod.rs @@ -105,8 +105,8 @@ mod gpio { impl GpioPin for super::lib::peripherals::$pin {} - impl Into for super::lib::peripherals::$pin { - fn into(self) -> AnyPin { + impl From for AnyPin { + fn from(val: super::lib::peripherals::$pin) -> Self { AnyPin } } @@ -242,7 +242,7 @@ pub fn configure_baudrate(regs: Regs, baudrate_bps: u32, clock: Clock) -> Result // Configure BAUD register regs.baud().modify(|_, w| unsafe { // Clear and set OSR - w.osr().bits((osr - 1) as u8); + w.osr().bits((osr - 1)); // Clear and set SBR w.sbr().bits(sbr); // Set BOTHEDGE if OSR is between 4 and 7 @@ -305,9 +305,9 @@ pub fn configure_fifo(regs: Regs, config: &Config) { // Configure WATER register for FIFO watermarks regs.water().write(|w| unsafe { w.rxwater() - .bits(config.rx_fifo_watermark as u8) + .bits(config.rx_fifo_watermark) .txwater() - .bits(config.tx_fifo_watermark as u8) + .bits(config.tx_fifo_watermark) }); // Enable TX/RX FIFOs @@ -377,7 +377,7 @@ pub fn calculate_baudrate(baudrate: u32, src_clock_hz: u32) -> Result<(u8, u16)> // Try OSR values from 4 to 32 for osr_temp in 4u8..=32u8 { // Calculate SBR: (srcClock_Hz * 2 / (baudRate * osr) + 1) / 2 - let sbr_calc = ((src_clock_hz * 2) / (baudrate * osr_temp as u32) + 1) / 2; + let sbr_calc = ((src_clock_hz * 2) / (baudrate * osr_temp as u32)).div_ceil(2); let sbr_temp = if sbr_calc == 0 { 1 @@ -390,11 +390,7 @@ pub fn calculate_baudrate(baudrate: u32, src_clock_hz: u32) -> Result<(u8, u16)> // Calculate actual baud rate let calculated_baud = src_clock_hz / (osr_temp as u32 * sbr_temp as u32); - let temp_diff = if calculated_baud > baudrate { - calculated_baud - baudrate - } else { - baudrate - calculated_baud - }; + let temp_diff = calculated_baud.abs_diff(baudrate); if temp_diff <= baud_diff { baud_diff = temp_diff; diff --git a/src/ostimer.rs b/src/ostimer.rs index a4cab6970..8bc68389a 100644 --- a/src/ostimer.rs +++ b/src/ostimer.rs @@ -151,6 +151,12 @@ pub struct Alarm<'d> { _phantom: core::marker::PhantomData<&'d mut ()>, } +impl<'d> Default for Alarm<'d> { + fn default() -> Self { + Self::new() + } +} + impl<'d> Alarm<'d> { /// Create a new alarm instance pub fn new() -> Self { diff --git a/src/rtc.rs b/src/rtc.rs index d62da1f0a..afd46610e 100644 --- a/src/rtc.rs +++ b/src/rtc.rs @@ -102,7 +102,7 @@ pub fn convert_seconds_to_datetime(seconds: u32) -> RtcDateTime { days -= days_in_year; year += 1; - days_in_year = if year % 4 == 0 { + days_in_year = if year.is_multiple_of(4) { DAYS_IN_A_YEAR + 1 } else { DAYS_IN_A_YEAR @@ -110,7 +110,7 @@ pub fn convert_seconds_to_datetime(seconds: u32) -> RtcDateTime { } let mut days_per_month = [0u8, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31]; - if year % 4 == 0 { + if year.is_multiple_of(4) { days_per_month[2] = 29; } diff --git a/src/uart.rs b/src/uart.rs index 3209a318d..cd504a6c6 100644 --- a/src/uart.rs +++ b/src/uart.rs @@ -118,7 +118,7 @@ impl Uart { StopBits::Two => w.sbns().two(), }; // OSR field encodes (osr-1); use raw bits to avoid a long match on all variants - let raw_osr = osr.saturating_sub(1) as u8; + let raw_osr = osr.saturating_sub(1); unsafe { w.osr().bits(raw_osr).sbr().bits(sbr) } }); // 3) CTRL baseline and parity @@ -195,6 +195,12 @@ pub struct RingBuffer { count: usize, } +impl Default for RingBuffer { + fn default() -> Self { + Self::new() + } +} + impl RingBuffer { pub const fn new() -> Self { Self { -- cgit